On-chip noise testing and self-repairing system
A noise testing and self-repairing technology, which is applied in the transmission system, electrical components, receiver monitoring, etc., can solve the problems of inability to integrate part of the noise characteristic test and the inability to realize the self-repair of the system noise performance, and achieve the effect of self-repair
Active Publication Date: 2019-07-05
ZHEJIANG UNIV
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Problems solved by technology
[0003] The existing technology uses instruments other than the integrated chip to test the noise characteristics of the circuit, which means that the noise characteristic test part cannot be integrated on the chip, and the self-repair of the system noise performance cannot be realized
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[0022] The present invention will be described in detail below according to the accompanying drawings and preferred embodiments, and the purpose and effect of the present invention will become clearer. The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0023] Such as figure 1 As shown, it is a schematic diagram of an on-chip noise test and self-repair system. The on-chip noise test and self-repair system includes an on-chip noise receiving link unit, an on-chip noise source and a noise calibration unit; the on-chip noise receiving link unit includes an on-chip DUT unit, an on-chip A noise receiver unit and a noise and nonlinear cancellation unit. The on-chip DUT unit includes a low-noise amplifier, and the on-chip noise receiver unit includes a down...
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The invention discloses an on-chip noise testing and self-repairing system, the system comprises an on-chip noise receiving link unit and an on-chip noise source and noise calibration unit, and the on-chip noise receiving link unit comprises an on-chip DUT unit, an on-chip receiver unit and a noise and non-linear offset unit. The on-chip noise receiving link unit is used for noise receiving, noisespectrum output and noise characteristic optimization. The on-chip noise source and the noise calibration unit are used for providing noise and realizing noise calibration. According to the on-chip noise testing and self-repairing system, noise coefficients can be obtained by testing noise energy of a receiver at different noise temperatures on chip, the working state of the radio frequency frontend is adjusted to achieve the optimal noise characteristic, and therefore on-chip noise performance testing and self-repairing are achieved.
Description
technical field [0001] The invention relates to the field of testing the noise performance of radio frequency analog circuits, in particular to an on-chip noise testing and self-repairing system. Background technique [0002] With the development of modern technology and technology, the performance of RF analog circuits is constantly optimized. Among them, the noise performance of RF analog circuits is determined by the front-end low-noise amplifier, and the noise performance determines the sensitivity and working distance of the receiver. This requires The system can evaluate the noise performance of the circuit and optimize it to improve the sensitivity of the receiver. [0003] In the prior art, an instrument other than the integrated chip is used to test the noise characteristic of the circuit, which means that the noise characteristic test part cannot be integrated on the chip, and the self-repair of the system noise performance cannot be realized. Contents of the inv...
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Login to View More IPC IPC(8): H04B17/21H04B17/29H04B1/10
CPCH04B1/1027H04B17/21H04B17/29
Inventor 徐志伟弓悦刘嘉冰邱良王圣杰赵锴龙
Owner ZHEJIANG UNIV