Encryption and decryption device and method for FPGA code stream

Abstract

The invention discloses an FPGA code stream encryption and decryption device and method, and the device comprises the steps: configuring a data code stream, judging whether the data code stream needsto be encrypted or not; if the first encryption mode is adopted for encryption, generating a first encrypted code stream and a first encrypted synchronous word, and if the second encryption mode is adopted for encryption, generating a second encrypted code stream and a second encrypted synchronous word; receiving an encrypted data code stream, and detecting whether an encrypted synchronization word exists in the encrypted data code stream or not; and if the first encryption synchronization word is detected, decrypting the encrypted data code stream by adopting a first decryption mode, and if the second encryption synchronization word is detected, decrypting the encrypted data code stream by adopting a second decryption mode.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to an encryption and decryption device and method for an FPGA code stream. Background technique [0002] Editable logic gate array (FPGA) is widely used in the current electronic system design because of its flexibility and convenience, but the FPGA based on static memory (SRAM) needs to be configured by writing the code stream from the outside. During the configuration process, the code stream It is easy to be intercepted, which poses a great threat to the security of FPGA chips, so the encryption of FPGA chips has gradually attracted the attention of designers. The existing FPGA part does not use encryption technology, especially most mid-range and low-end chips. If encryption is used, most of them use the encryption algorithm of Advanced Encryption Standard (AES) or Data Encryption Standard (DES) to encrypt FPGA. There is no encryption technology yet. An FPGA uses two differ...

AI Technical Summary

Problems solved by technology

[0002] Editable logic gate array (FPGA) is widely used in the current electronic system design because of its flexibility and convenience, but the FPGA based on static memory (SRAM) needs to be configured by writing the code stream from the outside. During the configuration process, the code stream It is easy to be intercepted, which poses a great threat to the security of FPGA chips, so the encryption of FPGA chips is gradually valued by designers

The existing FPGA part does not use encryption technology, especially most mid-range and low-end chips. If encryption is used, most of them use the encryption algorithm of Advanced Encryption Standard (AES) or Data Encryption Standard (DES) to encrypt FPGA. There is no encryption technology yet. One FPGA uses two different encryption algorithms at the same time, especially the Block Cipher Standard (SM4) algorithm

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