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Multi-layer memory and its manufacturing method

A memory and storage layer technology, applied in the storage field, can solve problems such as the increase of memory chip area and the conflict of wiring resources, and achieve the effects of reducing area, reducing interference, and reducing the difficulty and complexity of structural design

Active Publication Date: 2021-06-04
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the memory of the related art, if the word line driver and the page buffer are arranged on the same circuit layer, but the wiring resources of the two conflict, in order to realize the word line driver and the page buffer on the same circuit layer without metal traces The conflict of line resources will place the word line driver on the outside of the circuit layer corresponding to the storage area, which will increase the area of ​​the storage chip in the lateral direction

Method used

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  • Multi-layer memory and its manufacturing method
  • Multi-layer memory and its manufacturing method
  • Multi-layer memory and its manufacturing method

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Embodiment Construction

[0056] The technical solutions of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0057] Such as figure 1 As shown, this embodiment provides a multi-layer memory, including:

[0058] A stacked structure of multiple storage layers, wherein the storage layer has a middle area and a first edge area and a second edge area located on the edge; the area of ​​the n+1th storage layer is smaller than the area of ​​the nth storage layer, and The n+1th storage layer is stacked in the middle area of ​​the nth storage layer;

[0059] The first circuit layer is located on the first end face of the stack structure and has a word line driver; the word line driver is connected to the storage layer through a drive line; wherein, the drive line of the mth storage layer includes:

[0060]The first part is respectively connected to the first edge area of ​​the mth storage layer and the word line driver, and...

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Abstract

The embodiment of the invention discloses a multi-layer memory and a manufacturing method thereof. The multi-layer memory includes: a stack structure of multiple storage layers, the storage layer has a first edge region and a second edge region; a first circuit layer, located on the first end face of the stack structure and has a word line driver; the word line driver passes through the drive line Connected with the storage layer; the drive line of the mth storage layer, including: the first part, connecting the first edge area of ​​the mth storage layer and the word line driver; the second part, connected with the word line driver; the third part, parallel In the first part and through the second circuit layer, wherein the second circuit layer is located on the second end surface of the stacked structure, and the second end surface is opposite to the first end surface; the fourth part is located on the second circuit layer; the fifth part, It is connected with the fourth part and penetrates the second circuit layer; the sixth part is connected with the fifth part and is parallel to the fourth part; the seventh part is respectively connected with the sixth part and the second edge area of ​​the mth storage layer connect.

Description

technical field [0001] The invention relates to the technical field of storage, in particular to a multi-layer memory and a manufacturing method thereof. Background technique [0002] Double word line (WL) driven double-sided word line driven multilayer memory. In the memory of the related art, if the word line driver and the page buffer are arranged on the same circuit layer, but the wiring resources of the two conflict, in order to realize the word line driver and the page buffer on the same circuit layer without metal traces Due to the conflict of line resources, the word line driver will be arranged outside the circuit layer corresponding to the storage area, which will increase the area of ​​the storage chip in the lateral direction. Contents of the invention [0003] In view of this, the embodiments of the present invention expect to provide a multi-layer memory and a manufacturing method thereof. [0004] Technical scheme of the present invention is realized like ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/08G11C11/22
CPCG11C16/08G11C11/2257
Inventor 金允哲吴振勇阮庆仲梅文龙
Owner YANGTZE MEMORY TECH CO LTD
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