Permanent magnet synchronous motor resolver zero position calibration circuit

The invention discloses a permanent magnet synchronous motor resolver zero position calibration circuit comprising three voltage dividing circuits for collecting three-phase output voltages Ua, Ub and Uc of a permanent magnet synchronous motor. The output ends of the three voltage dividing circuits are connected with the in-phase input ends of three comparators U1A, U1B and U5A. The inverting input ends of the three comparators are connected with a bus negative electrode. The comparator output voltages Ua' and Ub' through an exclusive OR gate and the comparator output voltage Uc' are exclusive OR again. The output voltages of the three comparators are connected with the NO pin of an alternative analog switch through a digital isolator after the exclusive OR logic output. The resolver sampling signal and the selection signal sent by the DSP are connected with the NC pin and the IN pin of the alternative analog switch. The COM pin of the alternative analog switch connects the output signal to the SAMPLE pin of a resolver decoding chip. Resolver zero position calibration can be quickly performed, the cost is low, the response is fast and the calibration accuracy is high, and the circuit can be directly transplanted to a PCB for real-time calibration and self-learning for the hybrid vehicle type.