ASIC array, data processing board, and block excavation method and equipment
A technology of data processing and ASIC chips, which is applied in the blockchain field to achieve the effect of improving the hash calculation efficiency of block mining
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[0057] Figure 4 is a schematic diagram of the ASIC array structure of the first embodiment of the present invention. Such as Figure 4 As shown, in the first embodiment of the present invention, the ASIC array 100 includes a PCB circuit board 170 and an ASIC chip 110, wherein the ASIC chip 110 is arranged on the upper bottom surface and the lower bottom surface of the PCB circuit board 170, and on the upper bottom surface of the PCB circuit board 170 , there are 16 ASIC chips 110, which are uniformly distributed in a 4×4 array, and the same number of ASIC chips 110 are mirrored on the bottom surface of the PCB circuit board 170; each ASIC chip 110 includes two parallel bare chips 120; Each die 120 includes an on-chip network 130; the on-chip network 130 includes 72 computing nodes (Node) 140 and 6 reflector nodes (Reflector) 150, and the 72 computing nodes 140 are distributed in the form of a 6×12 array; The node 140-1 includes a memory (SRAM) 141, a mixer (Mixer) 142, and ...
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