The embodiment of the present application provides a reference voltage generating device, which is used to solve the technical problem of high manufacturing cost of the device caused by the complicated structure of the existing reference voltage generating device.
 See figure 1 The existing reference voltage generating device is composed of a startup circuit, a bias current generator, and a core output voltage structure. It uses four types of MOS transistors: the transistors with thicker gate lines have threshold voltages of 0.86V and − 0.77V 3.3VMOS transistors nMOS and pMOS, the rest are 1.8VMOS transistors nMOS and pMOS with threshold voltages of 0.47V and -0.45V, respectively.
 Its working principle is: the starting circuit is responsible for the work of the circuit device when the voltage is zero, and plays the role of a protection circuit. The bias current generation part uses the connection relationship of four cascade transistors to generate a bias current that is little affected by temperature. Then the current mirror mirrors the branch where the core structure is located, and generates a reference voltage VREF that is less affected by the power supply voltage and temperature by using the voltage relationship between the gate-source terminal of the MOS transistor (in the power supply voltage range of 1.5V to 3.5V and temperature Range -40℃~120℃, the generated reference voltage V REF The size is about 912mV).
 In view of the fact that the existing reference voltage generating device needs the participation of the bias current generating circuit to generate the reference current, and the number of devices used is large and also includes resistors and other devices, and the circuit structure is relatively complicated, which leads to the technical problem of high manufacturing cost.
 In order to make the purposes, features, and advantages of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the following The described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by a person of ordinary skill in the art without creative work shall fall within the protection scope of this application.
 See figure 2 , The embodiment of the application provides a reference voltage generating device, including: a first MOS tube M1, a second MOS tube M2, a third MOS tube M3, a fourth MOS tube M4, a fifth MOS tube M5, and a sixth MOS tube M6;
 The source of the first MOS tube M1 and the source of the second MOS tube M2 are electrically connected to the voltage source, respectively, the gate of the first MOS tube M1 is electrically connected to the gate of the second MOS tube M2, and the gate of the second MOS tube M2 is electrically connected. The pole is connected to the drain of the second MOS tube to form a current mirror structure;
 The drain of the first MOS transistor M1 is electrically connected to the gate and the drain of the third MOS transistor M3 and the gate of the fourth MOS transistor M4 respectively;
 The source of the third MOS transistor M3 is connected to the drain of the fourth MOS transistor M4, and is electrically connected to the gate of the sixth MOS transistor M6, and the threshold voltage of the fourth MOS transistor M4 is greater than the threshold voltage of the third MOS transistor M3 ;
 The drain of the second MOS transistor M2 is electrically connected to the gate and the drain of the fifth MOS transistor M5 and the gate of the sixth MOS transistor M6;
 The drain of the sixth MOS transistor M6 is connected to the source of the fifth MOS transistor M5 and electrically connected to the output port, and the threshold voltage of the sixth MOS transistor M6 is greater than the threshold voltage of the fifth MOS transistor M5.
 Through the circuit structure provided by this embodiment, the difference in the relationship between the gate-source voltages of different types of MOS transistor devices is used to output the reference voltage, eliminating the bias current branch, and reducing the amount of device usage. The structure of the reference voltage generating device is simplified, and the technical problem of high manufacturing cost of the device caused by the complicated structure of the existing reference voltage generating device is solved.
 More specifically, the first MOS tube M1 is a 1.8V PMOS tube.
 More specifically, the second MOS tube M2 is specifically a 1.8V PMOS tube.
 More specifically, the third MOS tube M3 is specifically a 1.8V NMOS tube.
 More specifically, the fourth MOS tube M4 is specifically a 3.3V NMOS tube.
 More specifically, the fifth MOS tube M5 is specifically a 1.8V NMOS tube.
 More specifically, the sixth MOS transistor M6 is specifically a 3.3V NMOS transistor.
 More specifically, the aspect ratio coefficients of the first MOS tube M1 and the second MOS tube M2 are equal.
 It should be noted that the aspect ratio coefficients of each MOS tube in this embodiment are shown in Table 1:
 Table 1 MOS tube width-length ratio coefficient comparison table
 Device name M1 M2 M3 M4 M5 M6 W/L, μm/μm 4/2 4/2 8/2 1.1/1.7 1/2.5 1.87/4
 The application provides a voltage reference generating device based on all CMOS tubes, the specific structure is as follows figure 2 As shown, compared with the existing circuit structure, the circuit structure of this embodiment does not require additional resistors, transistors and other devices, the bias current is generated by itself, and no additional current generation branch is required, and the devices all work in Saturation zone. This application can work at a power supply voltage of 450mV~1.5V, a temperature range of -25℃~125℃, and generate a reference voltage of about 247mV. Among them, M1 and M2 are 1.8V PMOS tubes, M3 and M5 are 1.8V NMOS tubes, M4 and M6 are 3.3V NMOS tubes, and the thresholds of the two different types of MOS devices of 1.8V and 3.3V are different. , Plays an important role in the output voltage reference, in actual use, it can also be replaced with other numerical devices. It is only necessary to ensure that the threshold values of the two different types of MOS devices are different.
 In order to explain the content of the invention more clearly, the circuit principle of this embodiment is provided below, which is specifically as follows:
 Determination of current I
 As shown in the figure, MOS transistors M1 and M2 are PMOS transistors and current mirrors, the current can be expressed as:
 Since all MOS transistors work in the saturation region, the saturated Sachs formula:
 As shown in the figure:
 V GS4 -V GS3 =V GS6 ④
 Substituting ③ into ④, we get:
 Reference voltage V REF The determination:
 As shown in the figure V REF =V GS6 -V GS5 , Substituting formula ③ into and simplifying:
 It should be noted that in the formula ①②③④⑤⑥⑦, Is the aspect ratio of the MOS transistor; V GS Is the gate-source voltage of the MOS transistor; V TH Is the threshold voltage of the MOS transistor; μ is the carrier mobility; C OX Is the gate oxide capacitor;
 The above is a detailed description of the technical solution of the embodiment of the application, and the following is the result of simulation test based on the technical solution of the above embodiment.
 See image 3 with Figure 4 , image 3 Is the reference voltage V REF The impact of the test results, such as image 3 Shown: When the temperature changes from -45℃ to 125℃, V REF The voltage variation range is only 664.7uV, indicating that the size of the reference voltage is hardly affected by temperature.
 Figure 4 Is the power supply voltage to the reference voltage V REF The impact of the test results, such as Figure 4 As shown, when the power supply voltage is 450mV~1.8V, the reference voltage V REF Less affected by the power supply voltage.
 In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the application and simplifying the description, and does not indicate or imply that the pointed device or element must have a specific orientation or a specific orientation. The structure and operation cannot therefore be understood as a limitation of this application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance.
 Unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be interpreted broadly. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, It can also be an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the internal communication between two components. For those of ordinary skill in the art, the specific meanings of the above-mentioned terms in this application can be understood under specific circumstances.
 As mentioned above, the above embodiments are only used to illustrate the technical solutions of the present application, not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, a person of ordinary skill in the art should understand that: The technical solutions recorded in the embodiments are modified, or some of the technical features are equivalently replaced; these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.