Detection method and device and SOC chip

Abstract

The invention discloses a detection method and device and an SOC chip, and the method comprises the steps that a register module receives a detection instruction, starts a loopback test according to the detection instruction, and determines the number of test bits; the test dm excitation processing module determines a plurality of target write instructions according to the test bits, sends a target writing instruction to a ddr controller, stores the target data corresponding to the target write instruction in the target address of the ddr particle and sends a target reading instruction to a ddr controller, thus the ddr controller obtains read data from a target address in the ddr particle according to the target read instruction; read data sent by the ddr controller is acquired, the targetdata is compared with the read data to obtain a comparison result, and if the comparison result is successful, a next target write instruction is sent to the ddr controller until all tests are completed to obtain a final comparison result; and the register module determines a test result according to the final comparison result. The test process can be simplified, and the test efficiency of the ddr data mask signal line is improved.

Description

technical field [0001] The present application relates to the technical field of detection, in particular to a detection method, a detection device and a SOC chip. Background technique [0002] At present, the operating frequency of the DDR module in the chip is getting higher and higher, which increases the difficulty of positioning and the cost of oscilloscope equipment. The high-speed interface physical layer (ddr phy) of many chip memories cannot cover the dm channel corresponding to the dm signal line (data mask signal line), because there is no dm channel in the read channel during the read operation, and it is impossible to pass through the ddr phy after writing After the read path is returned, compare it with the expected value to obtain whether the dm path is normal, and when the ddr particle is sealed with the chip in the Asic chip, it is impossible to check the value of the ddr dm signal line by grabbing the line. The related technology is to complete the task of...

AI Technical Summary

Problems solved by technology

The high-speed interface physical layer (ddr phy) of many chip memories cannot cover the dm channel corresponding to the dm signal line (data mask signal line), because there is no dm channel in the read channel during the read operation, and it is impossible to pass through the ddr phy after writing After the read path is returned, compare it with the expected value to obtain whether the dm path is normal, and when the ddr particle is sealed with the chip in the Asic chip, it is impossible to check the value of the ddr dm signal line by grabbing the line

The related technology is to complete the task of chip testing through software-assisted loopback. After initializing the DDR, use the software to access the DDR particles through specific incentives, and complete the test of the DM signal line through the results of the read-write comparison. However, the entire process relies on software execution. The test time is long, which leads to low test efficiency

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