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JTAG link automatic identification and expansion device

A technology for automatic identification and expansion of devices, applied in the fields of instruments, electrical digital data processing, computing, etc., can solve problems such as the inability to automatically identify and adjust the length of the JTAG link, and the inability to meet the needs of local circuit debugging, achieving multiple selectivity. Effect

Pending Publication Date: 2020-02-11
HEFEI JUNDA HI TECH INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, a variety of applications are derived from the JTAG link in the industry, but the existing cascading and adjustment schemes of the JTAG link between PCB boards need to be controlled by software, and the length of the JTAG link cannot be automatically identified and adjusted. Fixed JTAG maximum link, with certain constraints
Moreover, in the process of use, it is more inclined that the circuit can be cascaded from the whole to the local stages, but the existing solutions cannot meet the needs of local circuit debugging.

Method used

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  • JTAG link automatic identification and expansion device
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Embodiment Construction

[0018] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0019] Such as figure 1 , figure 2 As shown, a JTAG link automatic identification and expansion device includes at least two PCB0, each PCB0 is provided with a first JTAG connector 1, a second JTAG connector 2, a chip 3 and at least one The JTAG sub-link 4 formed by connecting JTAG devices in series (the JTAG sub-link mentioned here has the same definition as the known JTAG link, but uses different names for the convenience of expression, the same below).

[0020] The TDI pin of the first JTAG device of JTAG sub-link 4 on each PCB0 is connected to the TDI pin of the first JTAG connector 1, and the TDO pin of the last JTAG device of JTAG sub-link 4 is respectively connected to the second JTAG The TDO pin of the connector 2 is connected to the first input pin IN1 of the second choice chip 3, and the second input pin IN2 of the second choice ch...

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Abstract

The invention provides a JTAG link automatic identification and expansion device which comprises at least two PCBs, and each PCB is provided with a first JTAG connector, a second JTAG connector, an either-or chip and a JTAG sub-link formed by connecting at least one JTAG device in series. According to the device, the control signal input of the either-or chip is changed through the disconnection and connection of the second JTAG connector on the first PCB and the first JTAG connector on the second PCB in the two adjacent PCBs; therefore, the length of the JTAG link is automatically adjusted, software control is not needed, the range of a test object can be selected in a targeted mode according to requirements, and more selections are provided for a user.

Description

technical field [0001] The invention relates to the technical field of cascading JTAG links between PCB boards, in particular to a JTAG link automatic identification and expansion device. Background technique [0002] JTAG (Joint Test Action Group, Joint Test Working Group) is an international standard test protocol, mainly used for chip internal testing. At present, many complex devices support the JTAG protocol, such as DSP, FPGA and other devices. Generally, such devices supporting the JTAG protocol are called JTAG devices. It is very convenient to download and debug JTAG devices through the JTAG connector. [0003] When multiple JTAG devices are included in the circuit, if a JTAG connector is separately provided for each JTAG device, the space occupied by the circuit will be greatly increased. One solution is to connect multiple JTAG devices in the circuit in series to form a JTAG link (that is, TDI is connected to TDO to TDI to form a non-closed JTAG link, wherein the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/26G06F11/22
CPCG06F11/2236G06F11/26
Inventor 陈浩卢小银石倩倩万千孟强吕盼稂金一严德斌
Owner HEFEI JUNDA HI TECH INFORMATION TECH