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Structure and method for isolation of bit line driver of three-dimensional NAND

A three-dimensional, deep trench isolation technology, applied in semiconductor devices, electrical solid state devices, semiconductor/solid state device manufacturing, etc., can solve complex isolation problems

Inactive Publication Date: 2020-03-06
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the size of 3D memory becomes smaller and smaller, the isolation between peripheral devices such as bit line drivers becomes complicated

Method used

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  • Structure and method for isolation of bit line driver of three-dimensional NAND
  • Structure and method for isolation of bit line driver of three-dimensional NAND
  • Structure and method for isolation of bit line driver of three-dimensional NAND

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Experimental program
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Embodiment Construction

[0037] While specific configurations and arrangements are discussed, it should be understood that this is done for illustration purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements may be used without departing from the spirit and scope of the present disclosure. It will be apparent to those skilled in the relevant art that the present disclosure may also be used in various other applications.

[0038] It should be noted that references in the specification to "one embodiment," "an embodiment," "exemplary embodiment," "some embodiments," etc. indicate that the described embodiments may include a particular feature, structure, or characteristic, But each embodiment may not necessarily include that particular feature, structure or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in conjunction wit...

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PUM

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Abstract

Embodiments of a three-dimensional (3D) storage device and a manufacturing method are disclosed. In some embodiments, a 3D storage device includes a peripheral circuit formed on a first substrate. Theperipheral circuit includes a plurality of peripheral devices on a first side of the first substrate, a first interconnect layer, and a deep trench isolation on a second side of the first substrate,wherein the first side and the second side are opposite sides of the first substrate, and the deep trench isolation is configured to provide electrical isolation between at least two adjacent peripheral devices. The 3D storage device also includes a storage array formed on the second substrate. The storage array includes at least one storage cell and a second interconnect layer, where the second interconnect layer of the storage array is bonded to the first interconnect layer of the peripheral circuit, and the peripheral devices are electrically connected to the storage cell.

Description

technical field [0001] The present disclosure relates generally to the field of semiconductor technology, and in particular, to a method for forming a three-dimensional (3D) memory. Background technique [0002] As memory devices shrink to smaller die sizes to reduce manufacturing costs and increase storage density, scaling of planar memory cells is challenged due to process technology limitations and reliability issues. Three-dimensional (3D) memory architectures can address density and performance limitations in planar memory cells. [0003] In 3D memory, certain peripheral circuits such as bit line drivers for page buffers use high voltages to support storage functions such as erasing and programming memory cells. However, as the size of 3D memory becomes smaller and smaller, the isolation between peripheral devices (such as bit line drivers) becomes complicated. There is a need for isolation that can provide desired characteristics (eg, low leakage current and high bre...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/065H01L27/1157H01L27/11573H01L27/11578H10B41/27H10B41/40H10B41/50H10B43/20H10B43/27H10B43/35H10B43/40H10B43/50
CPCH01L25/0657H01L23/528H01L24/50H01L24/89H01L21/31053H01L21/76224H01L25/18H01L24/08H01L2224/80001H01L2224/8083H01L27/0688H01L2924/14511H01L2224/80075H01L2224/80097H01L24/80H01L2224/8009H01L2224/80896H01L2224/80895H01L2224/80013H01L23/5226H01L2224/08147H01L21/2007H01L2224/08145H01L2224/08146H10B43/50H10B43/40H10B43/20H10B43/35H10B43/27
Inventor 陈亮刘威甘程
Owner YANGTZE MEMORY TECH CO LTD