CMOS voltage reference circuit with ultralow linear sensitivity

Abstract

The invention discloses a CMOS voltage reference circuit with ultralow linear sensitivity. The circuit comprises a first intrinsic NMOS tube M1, a second intrinsic NMOS tube M2 and a standard NMOS tube M3; an input signal VDD is connected with a drain electrode of the first intrinsic NMOS tube M1; the grid electrode of the first intrinsic NMOS tube M1 is connected with the grid electrode and the drain electrode of the standard NMOS tube M3; the drain electrode of the standard NMOS tube M3 is connected with output reference voltage VREF,; the source electrode of the first intrinsic NMOS tube M1is connected with the drain electrode of the second intrinsic NMOS tube M2; the grid electrode of the second intrinsic NMOS tube M2 is connected with a ground signal GND; the source electrode of thesecond intrinsic NMOS tube M2 is connected with the drain electrode of the standard NMOS tube M3 and an output reference voltage VREF; and the source electrode of the standard NMOS tube M3 is connected with a ground signal GND. According to the invention, the linear sensitivity of the voltage reference can be effectively reduced, so that the influence of the power supply voltage on the voltage reference is suppressed, and meanwhile, the chip area can be reduced, thereby saving the circuit cost.

Description

technical field [0001] The invention relates to a CMOS voltage reference circuit with ultra-low linear sensitivity, belonging to the technical field of voltage references. Background technique [0002] The voltage reference module is an important basic module in both analog circuits and digital-analog hybrid circuits. The voltage reference needs to provide a reference voltage that does not change with the process, power supply voltage and temperature. With the development of high integration and low power consumption, the design of voltage reference is more stringent. At low voltage, the design of the voltage reference will have more difficulties. [0003] Now the main voltage reference can be divided into bandgap reference voltage and CMOS reference voltage. Since BJT devices are needed in the bandgap reference voltage, affected by the characteristics of the BJT device itself, it is difficult for the bandgap reference circuit to work at a low voltage. Therefore, a voltag...

AI Technical Summary

Problems solved by technology

Due to the need to use BJT devices in the bandgap reference voltage, affected by the characteristics of the BJT device itself, it is difficult for the bandgap reference circuit to work under low voltage conditions

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