A cmos voltage reference circuit with ultra-low linear sensitivity

Abstract

The invention discloses a CMOS voltage reference circuit with ultra-low linear sensitivity, comprising: a first intrinsic NMOS transistor M1, a second intrinsic NMOS transistor M2, and a standard NMOS transistor M3, wherein the input signal VDD and the first intrinsic NMOS transistor The drain of M1 is connected, the gate of the first intrinsic NMOS transistor M1 is respectively connected to the gate and drain of the standard NMOS transistor M3, and the drain of the standard NMOS transistor M3 is connected to the output reference voltage V REF connected, and the source of the first intrinsic NMOS transistor M1 is connected to the drain of the second intrinsic NMOS transistor M2; the gate of the second intrinsic NMOS transistor M2 is connected to the ground signal GND, and the second intrinsic NMOS transistor M2 The source of the standard NMOS transistor M3 and the drain of the output reference voltage V REF connected; the source of the standard NMOS transistor M3 is connected to the ground signal GND. The invention can effectively reduce the linear sensitivity of the voltage reference, thereby suppressing the influence of the power supply voltage on the voltage reference, and can reduce the chip area to save the circuit cost.

Description

technical field [0001] The invention relates to a CMOS voltage reference circuit with ultra-low linear sensitivity, belonging to the technical field of voltage references. Background technique [0002] The voltage reference module is an important basic module in both analog circuits and digital-analog hybrid circuits. The voltage reference needs to provide a reference voltage that does not change with the process, power supply voltage and temperature. With the development of high integration and low power consumption, the design of voltage reference is more stringent. At low voltage, the design of the voltage reference will have more difficulties. [0003] Now the main voltage reference can be divided into bandgap reference voltage and CMOS reference voltage. Since BJT devices are needed in the bandgap reference voltage, affected by the characteristics of the BJT device itself, it is difficult for the bandgap reference circuit to work at a low voltage. Therefore, a voltag...

AI Technical Summary

Problems solved by technology

Due to the need to use BJT devices in the bandgap reference voltage, affected by the characteristics of the BJT device itself, it is difficult for the bandgap reference circuit to work under low voltage conditions

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