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memory device

A memory and memory unit technology, applied in the field of memory, to achieve the effect of increasing the amount of data accessed, ensuring normal operation, and avoiding reflection and resonance

Active Publication Date: 2022-01-25
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the case of limited data transmission speed, how to further increase the amount of data accessed will be a considerable challenge

Method used

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Experimental program
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Embodiment Construction

[0016] Please also refer to figure 1 . figure 1 It is a circuit diagram of a memory device 1 in an embodiment of the present invention. The memory device 1 includes: a driver chip 100 , a voltage dividing resistor 102 , noise-suppression resistors 104A- 104B and memory units 106A- 106C.

[0017] In one embodiment, the driver chip 100 is a system on a chip (system on a chip, system on chip; SoC), and is configured to drive the memory units 106A-106C through the connection path 101, so as to store data in the memory units 106A-106C. Pick. In different embodiments, the connection path 101 can be various buses capable of transmitting signals.

[0018] One end of the voltage dividing resistor 102 is electrically coupled to the voltage source V tt , and the other end is electrically coupled to the driver chip 100 through the terminal A of the connection path 101 .

[0019] In one embodiment, the memory units 106A- 106C are double data rate synchronous dynamic random access memo...

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PUM

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Abstract

A memory device includes: a driver chip, a voltage dividing resistor, at least two noise suppressing resistors and at least three memory cells. One end of the voltage dividing resistor is electrically coupled to the voltage source, and the other end is electrically coupled to the driver chip through the terminal of the connection path. One of the memory cells is electrically coupled to the voltage dividing resistor and the driver chip through the terminal of the connection path, and at least two memory cells are respectively electrically coupled to the connection path through a noise suppression resistor for further electrical coupling on the driver chip.

Description

technical field [0001] The present invention relates to memory technology, and in particular to a memory device. Background technique [0002] Electronic devices are often provided with memory devices for storing data and accessing from the memory devices when needed. Under the trend of increasing demand for information volume access, electronic devices will have higher and higher requirements for data transmission speed of memory devices. However, in the case of a limited increase in data transmission speed, how to further increase the amount of data accessed will be a considerable challenge. [0003] Therefore, how to design a new memory device to solve the above-mentioned deficiency is an urgent problem to be solved in the industry. Contents of the invention [0004] The object of the present invention is to provide a memory device, including: a driver chip, a voltage dividing resistor, at least two noise suppression resistors, and at least three memory cells. One en...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/22
CPCG11C7/22
Inventor 罗钦元吴亭莹罗新慧庄南卿
Owner REALTEK SEMICON CORP