Unlock instant, AI-driven research and patent intelligence for your innovation.

Solid-state imaging element and imaging device

A technology of solid-state imaging elements and transistors, which is applied in the fields of electrical components, image communication, and color TV components, etc., which can solve the problems of extended stabilization time and achieve excellent wiring capacitance effects

Active Publication Date: 2022-05-13
SONY SEMICON SOLUTIONS CORP
View PDF11 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At this time, if a parasitic capacitance occurs on one of the vertical signal lines, the parasitic capacitance causes a prolongation of a settling time until the potential on the vertical signal line becomes constant.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Solid-state imaging element and imaging device
  • Solid-state imaging element and imaging device
  • Solid-state imaging element and imaging device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0064] 1. First Embodiment (Example of Connecting a Negative Capacitance Circuit to a Vertical Signal Line)

[0065] 2. Second Embodiment (Example of Connecting a Negative Capacitance Circuit Provided with an Amplifier with Small Gain to a Vertical Signal Line)

[0066] 3. Third Embodiment (Example in which a negative capacitance circuit including a two-way split transistor (two-way split transistor) is connected to a vertical signal line)

[0067] 4. Fourth Embodiment (Example of connecting a negative capacitance circuit including one of 2-way division transistors and an amplifier with a large gain to a vertical signal line)

[0068] 5. Fifth Embodiment (Example of Connecting a Negative Capacitance Circuit Sharing ADC and Capacitors to Vertical Signal Lines)

[0069] 6. Sixth Embodiment (Example of Connecting a Negative Capacitance Circuit Sharing a Sample Hold Circuit and a Capacitor to a Vertical Signal Line)

[0070] 7. Seventh Embodiment (Example of Connecting a Negativ...

Embodiment approach

[0335] (1) A solid-state imaging element comprising:

[0336] a logic circuit configured to process an analog signal;

[0337] a pixel circuit configured to generate the analog signal through photoelectric conversion, and output the analog signal to the logic circuit via a predetermined signal line; and

[0338] a negative capacitance circuit connected to the predetermined signal line.

[0339] (2) The solid-state imaging device according to (1), wherein the negative capacitance circuit includes:

[0340] an amplifier whose input terminal is connected to the predetermined signal line; and

[0341] a capacitor, the two terminals of which are respectively connected to the input terminal and output terminal of the amplifier.

[0342] (3) The solid-state imaging device according to (1), further comprising:

[0343] a current source connected to the predetermined signal line,

[0344] Wherein, the negative capacitance circuit includes:

[0345] an insertion transistor inserte...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention can more easily reduce the wiring capacitance of the vertical signal lines in a solid-state imaging device that outputs signals via the vertical signal lines. This solid-state imaging element is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In this solid-state imaging device, the logic circuit processes an analog signal. In addition, in this solid-state imaging device, the pixel circuit generates the analog signal through photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In this solid-state imaging element, the negative capacitance circuit is connected to the predetermined signal line.

Description

technical field [0001] This technology relates to a solid-state imaging element and an imaging device. More specifically, the present technology relates to a solid-state imaging element and an imaging device in which vertical signal lines are arranged. Background technique [0002] In the past, solid-state imaging elements have been used in devices such as imaging devices to capture image data. Generally, in a solid-state imaging element, a plurality of pixel circuits are arranged in a two-dimensional matrix, and vertical signal lines are also arranged for each column. Also, the pixel circuits output signals via these vertical signal lines. At this time, if a parasitic capacitance occurs on one of the vertical signal lines, the parasitic capacitance causes prolongation of a settling time until the potential on the vertical signal line becomes constant. Therefore, in order to reduce the influence of parasitic capacitance, a solid-state imaging element has been proposed in ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/378H04N5/374
CPCH04N25/671H04N25/79H04N25/75H04N25/78H04N25/778
Inventor 植野洋介戈兰·蔡特尼诺姆·埃谢尔池田裕介牧川洁志
Owner SONY SEMICON SOLUTIONS CORP