Shift register circuit, dynamic random access memory and circuit control method

A shift register, circuit control technology, applied in the field of dynamic random access memory and circuit control, shift register circuit, can solve the problem of fixed shift length of shift register, and achieve the effect of reducing power consumption

Pending Publication Date: 2020-05-05
CHANGXIN MEMORY TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The purpose of the present disclosure is to provide a shift register circuit, a dynamic random access memory and a circuit control method, and then at least to a certain extent solve the problem that the shift length of the shift register in the existing DDR4 SDRAM read path is fixed

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  • Shift register circuit, dynamic random access memory and circuit control method
  • Shift register circuit, dynamic random access memory and circuit control method
  • Shift register circuit, dynamic random access memory and circuit control method

Examples

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Embodiment Construction

[0025] Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of the specific details being omitted, or other methods, components, devices, steps, etc. may be adopted. In other instances, well-known technical solution...

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Abstract

The invention discloses a shift register circuit, a dynamic random access memory and a circuit control method, and relates to the technical field of integrated circuits. The shift register circuit isapplied to a DDR4 SDRAM reading path, and comprises eight cascaded D triggers, a first D trigger, a second D trigger, a third D trigger, a fourth D trigger and a fifth D trigger, the first input end of the OR gate receives an input signal, and the output end of the OR gate is connected with the input end of the first D trigger in the eight D triggers; the control unit is at least respectively connected with the ith D trigger in the eight D triggers, the eighth D trigger and the second input end of the OR gate; wherein i belongs to [1, 7] and is a positive integer; the control unit controls theshift length of the shift register circuit based on a control signal. According to the circuit, the shift length of the shift register in the reading path can be controlled based on different scenesof the DDR4 SDRAM reading path.

Description

technical field [0001] The present disclosure relates to the technical field of integrated circuits, in particular to a shift register circuit, a dynamic random access memory and a circuit control method. Background technique [0002] A shift register (Shift Register) is a flip-flop-based device that operates on several identical time pulses. Data can be input into the shift register in a parallel or serial manner, and then each clock pulse is shifted one bit to the left or right in turn, and output at the output terminal. Shift registers have a wide range of application scenarios. For example, shift registers can be used to form counters, sequential pulse generators, serial accumulators, and data converters for converting between serial data and parallel data. [0003] With the development of memory technology, DDR4SDRAM (Double Data Rate Fourth Synchronous Dynamic Random Access Memory, double data rate fourth synchronous dynamic random access memory) came into being. DDR4...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
CPCG11C11/40603
Inventor 范习安
Owner CHANGXIN MEMORY TECH INC
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