A wiring method for integrated circuit vlsi

Abstract

A wiring method for an integrated circuit VLSI, comprising the following steps: 1) reading in net port information to generate a port graph; 2) constructing a grid graph according to wiring related parameters; 3) connecting two adjacent connected objects to generate a new Connected body, the grid where the new connected body and the grid map overlap is used as the starting point for the next iteration of connecting two adjacent connected bodies; 4) Repeat step 3) to all port graphs in the line network and its connection to form a new connected body. The wiring method of the integrated circuit VLSI of the present invention can start from a certain point in the generated wiring path and connect to other port graphics or wiring paths, breaking the limitation that traditional algorithms such as kruskal and prim can only connect endpoint graphics to endpoints , significantly reducing the wiring length.

Description

technical field [0001] The present invention relates to the technical field of integrated circuit VLSI, in particular to a wiring method of integrated circuit VLSI. Background technique [0002] In the detailed wiring stage of VLSI, a network often has multiple port patterns waiting to be connected. In order to optimize the important cost value of the length of the network after connecting the network, the commonly used algorithm is to use the minimum spanning tree such as prim, kruskal, etc. The algorithm idea constructs the connection relationship between the line net port graphs, but the above minimum spanning tree algorithm can only realize the connection between the port graph and the port graph, and cannot optimize and reduce the line length during wiring. SUMMARY OF THE INVENTION [0003] In order to solve the deficiencies in the prior art, the purpose of the present invention is to provide a wiring method for integrated circuit VLSI, in the detailed wiring stage, f...

AI Technical Summary

Problems solved by technology

[0002] In the detailed wiring stage of VLSI, a net often has multiple port graphics waiting to be connected. In order to optimize the important value of the length of the net after connecting the net, the commonly used algorithm is to use the minimum spanning tree such as prim and kruskal The algorithm idea constructs the connection relationship between the port graphs of the line network, but the above minimum spanning tree algorithm can only realize the connection between port graphs and port graphs, and cannot optimize and reduce the line length during wiring

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