Side suppression neuron circuit based on ferroelectric transistor FeFET

Abstract

The invention provides a side suppression neuron circuit based on a ferroelectric transistor FeFET. The side suppression neuron circuit comprises a capacitor, a reset tube, a positive feedback tube, atwo-stage series inverter and a ferroelectric transistor. The capacitor is used for simulating cell membrane capacitance of biological neurons and accumulating charges brought by input post-synapticcurrent; the reset tube is an N-type MOSFET device and provides a reset path for charges accumulated on the capacitor. The positive feedback tube is a P-type MOSFET device, and charges are supplemented to the capacitor when the input of the first-stage inverter is close to the logic threshold level of the first-stage inverter; the two-stage series inverter consists of two groups of complementary CMOS (Complementary Metal-Oxide-Semiconductor Transistor) and plays a role in amplifying the voltage change of the input end, and pulses are generated at the output end of the two-stage series inverter; the ferroelectric transistor is an N-type FeFET device and is used for simulating a side inhibition function of a biological neuron. According to the invention, hardware overhead can be significantly reduced; meanwhile, the basic characteristics and advanced functions of biological neurons are highly simulated.

Description

technical field [0001] The invention relates to the physical realization of side-inhibitory neurons in neuromorphic computing, in particular to a side-inhibition neuron circuit based on ferroelectric transistor FeFET. Background technique [0002] With the vigorous development of information technology, human society has entered the era of "data explosion", and the annual exponential growth of data volume has brought unprecedented pressure on data processing and calculation. Due to the characteristics of the traditional von Neumann computing architecture, which separates storage and computing, the transmission of data between the storage unit and the computing unit will cause a lot of waste of power consumption and energy consumption. In today's information society and even the intelligent society, there is a huge amount of data In this context, this problem will become more and more serious. [0003] Inspired by the computing model of the human brain, the researchers propo...

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Problems solved by technology

At present, in terms of the hardware implementation of neuromorphic computing, many research institutions and enterprises have developed a variety of neuromorphic chips. Mainly based on traditional CMOS circuit construction, there are problems such as large hardware overhead and high circuit energy consumption, which is not conducive to high-density and large-scale integration, and may cause the network to

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