A method for embedding chips in cavities on the front and back sides of an adapter board
An adapter board and chip technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of complex process and high cost, and achieve the effect of large economic benefits, large cost advantages, and broad application prospects
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Embodiment 1
[0057] Include:
[0058]A: Make TSV (silicon through hole) on a silicon wafer with a double layer SOI (Silicon-On-Insulator) layer, TSV stops on the surface of the second layer OFI, and electroplated metal fills TSV;
[0059] as Figure 1 As shown, the SOI wafer 101 is selected, wherein 102 is the SOI layer, the present silicon wafer has two layers of SOI, from top to bottom, the first layer of SOI layer 102 and the second layer of SOI layer;
[0060] as Figure 2 As shown, by lithography, etching process in the SOI silicon wafer surface to make TSV hole 103, hole diameter range from 1um to 1000um, depth in 10um to 1000um;
[0061] Etching stops on the second SOI layer;
[0062] as Figure 3 As shown, the insulation layer such as silicon oxide or silicon nitride is deposited above the silicon wafer, or direct thermal oxidation, and the thickness of the insulation layer ranges from 10nm to 100um; through physical sputtering, magnetron sputtering or evaporation process to make a seed l...
Embodiment 2
[0074] Include:
[0075] A: Make TSV on a silicon wafer with a double layer OFI layer, TSV stops at the surface of the second layer of SOI, continues to etch TSV to the lower surface of SOI, and electroplates the metal filled TSV;
[0076] as Figure 11As shown, select SOI silicon wafer, this silicon wafer has two layers of SOI; through lithography, etching process in the SOI silicon wafer surface to make TSV holes, hole diameter range from 1um to 1000um, depth in 10um to 1000um;
[0077] Etch TSV stops at the surface of the second layer of SOI and continues to etch TSV to the lower surface of SOI;
[0078] Deposition of silicon oxide or silicon nitride and other insulating layers above the silicon wafer, or direct thermal oxidation, the thickness of the insulation layer ranges from 10nm to 100um; through physical sputtering, magnetron sputtering or evaporation process to make a seed layer above the insulation layer, the thickness of the seed layer ranges from 1nm to 100um, which c...
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