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3D memory device and manufacturing method thereof

A technology for a memory device and a manufacturing method, applied in the field of memory, can solve the problems of bottom select gate BSG threshold voltage shift, poor charge binding ability, easy charge leakage and the like

Active Publication Date: 2020-07-07
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the poor charge confinement ability of the bottom select gate (BSG), the charges on the charge storage layer can easily leak into the channel layer, which will cause the threshold voltage Vt of the bottom select gate BSG to shift, affecting the performance of 3D memory devices. , especially during erase or read / write

Method used

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  • 3D memory device and manufacturing method thereof
  • 3D memory device and manufacturing method thereof
  • 3D memory device and manufacturing method thereof

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Embodiment Construction

[0027] Various embodiments of the invention will be described in more detail below with reference to the accompanying drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale.

[0028] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0029] "Above" described in the present invention refers to being located above the plane of the substrate, which may refer to direct contact between materials, or may be arranged at intervals.

[0030] In the present application, the term "semiconductor structure" refers to a general designation of the entire semiconductor structure formed in various steps of manufacturing a memory device, including all layers or regions that have been formed. In the following, many specific details of the prese...

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Abstract

The invention discloses a 3D memory device and a manufacturing method thereof. The 3D memory device comprises a substrate; a gate stack structure located above the substrate, wherein the gate stack structure comprises a plurality of interlayer insulating layers and a plurality of gate conductors which are alternately stacked; a plurality of channel columns penetrating through the gate stack structure, wherein each channel column comprises a functional layer located on the side wall of the channel column and a channel layer; a silicon groove formed by removing the functional layer at the bottomof the channel column; and an epitaxial layer located in the silicon groove, wherein the surface screens on the two sides of the silicon groove are arranged between the surface planes of the two lowermost layers of gate conductors in the gate stack structure, and part of the channel layer is located in the silicon groove. In the embodiment of the invention, the functional layer at the bottom of the channel hole is removed to form a silicon groove, and the epitaxial layer is formed in the silicon groove; and the functional layer is only positioned on the side wall of the channel hole without acorner, so that the charge binding capacity of the charge storage layer is improved, the charge on the charge storage layer is prevented from leaking into the channel layer, and the stability of thethreshold voltage of the bottom selection gate of the 3D memory is improved.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a 3D memory device and a manufacturing method thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the aperture of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] The formation process of the existing 3D NAND memory generally includes: forming a stacked layer in which silicon nitride layers and silicon oxide layers are alternately stacked on a subs...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/1157H01L27/11573H01L27/11575H01L27/11582H10B43/35H10B43/27H10B43/40H10B43/50
CPCH10B43/50H10B43/40H10B43/35H10B43/27
Inventor 刘沙沙
Owner YANGTZE MEMORY TECH CO LTD