A low-voltage multifunctional charge-trapping synaptic transistor and its preparation method

Abstract

The invention discloses a low-voltage multifunctional charge-trapping synaptic transistor and a preparation method thereof, belonging to the field of synaptic devices oriented to the application of neural network hardware. The present invention adopts silicon nitride and hafnium oxide double trapping layer structure to simultaneously realize short-term and long-term synaptic plasticity on a single device, thereby enriching the function of synaptic devices; the triple-gate nanowire structure is beneficial to enhance the interface electric field, thereby reducing The FN tunneling width at the interface is increased, the tunneling probability at the interface is enhanced, and the operating voltage and power consumption of the device are reduced. In addition, the device has complete CMOS material and process compatibility, and these excellent device characteristics make it have the potential to be applied to large-scale neural network computing systems in the future.

Description

technical field [0001] The invention relates to the field of neuromorphic computing systems, provides basic synaptic device units for building neuromorphic computing systems, and particularly relates to a charge-trapping synaptic transistor with the advantages of low power consumption, high reliability and good CMOS process compatibility. Background technique [0002] Neuromorphic computing is a new type of computing architecture that integrates storage and computing by simulating the computing model of a high-parallel, high-fault-tolerant, and energy-efficient biological neuromorphic system. The basis of the morphological computing system. For synaptic devices, a large number of synaptic devices have emerged, such as Resistive Random Access Memory (RRAM), Phase Change Random Access Memory (PCRAM), ion gate control Synaptic transistor (Ionic Gated Field-effect Transistor, IGFET) and charge trapping synaptic transistor (Charge Trapped Field-effect Transistor, CTFET), in which...

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Problems solved by technology

[0002] Neuromorphic computing is a new type of computing architecture that integrates storage and computing by simulating the computing model of a high-parallel, high-fault-tolerant, and energy-efficient biological neuromorphic system. The basis of the morphological computing system. For synaptic devices, a large number of synaptic devices have emerged, such as Resistive Random Access Memory (RRAM), Phase Change Random Access Memory (PCRAM), ion gate control Synaptic transistor (Ionic Gated Field-effect Transistor, IGFET) and charge trapping synaptic transistor (Charge Trapped Field-effect Transistor, CTFET), in which the charge trapping synaptic transistor has good CMOS process compatibility, high integration density and read The advantage of writing separation, but the current charge-trapping synaptic transistors have challenges such as single function and high operating voltage

[0003] Specifically, because CTFETs work based on a non-volatile charge-trapping mechanism, they can only simulate long-term synaptic plasticity, lacking the simulation of equally important short-term plasticity, and short-term plasticity play an important role in synaptic computing

[0004] On the other hand, charges need to tunnel through a relatively wide potential barrier during programming and erasing, so the operating voltage is high

[0005] In summary, synaptic transistors that operate at low voltage and can simultaneously achieve short- and long-term plasticity remain to be developed.

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