Unlock instant, AI-driven research and patent intelligence for your innovation.

Memory and test method thereof

A memory and physical storage technology, applied in static memory, instruments, etc., can solve the problems of large memory area, high physical area of ​​system chips, high cost of chip production and testing, etc.

Active Publication Date: 2020-10-23
上海燧原科技有限公司
View PDF3 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, the corresponding test logic area of ​​the existing memory is relatively large, which makes the area of ​​the memory larger and occupies a higher physical area of ​​the system chip, making the production and testing costs of the chip more and more high.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Memory and test method thereof
  • Memory and test method thereof
  • Memory and test method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings but not all structures.

[0023] As mentioned in the background technology, the existing memory has the problem of large test logic area. After careful research, the inventor found that the reason for this problem is: figure 1 For the structure diagram of the memory of the existing system on chip, refer to figure 1 , the existing memory includes a plurality of physical storage units 101' and a plurality of test logic units 102', and the physical storage units 101' and the test logic units 102' are electrically connected in one-to-one corre...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The embodiment of the invention discloses a memory of a system-on-chip and a test method thereof. The memory includes: a plurality of physical memory cells; a plurality of first logic mapping units, wherein each first logic mapping unit is electrically connected with the at least two physical storage units; second logic mapping unit which is electrically connected with the first logic mapping units; a test logic unit which is electrically connected with the second logic mapping unit and is used for testing the physical storage unit through the second logic mapping unit and the first logic mapping units, wherein a functional circuit of the system-on-chip is multiplexed as the first logic mapping unit, and the functional circuit is also used for working when the physical storage unit is tested. According to the memory, the test logic composed of the first logic mapping unit, the second logic mapping unit and the test logic unit has the advantages of small area and the like.

Description

technical field [0001] The embodiment of the present invention relates to memory testing technology, in particular to a memory and a testing method thereof. Background technique [0002] With the development of the big data era, the magnitude and complexity of the data that needs to be calculated has also increased dramatically, and the size of high-performance system-on-chip chips has continued to increase. Memory, especially on-chip storage logic, can effectively reduce the number of data transmissions and delays, thereby ensuring the data exchange efficiency of high-performance computing chips. Thus, the demand for on-chip memory is rapidly increasing. [0003] However, the corresponding test logic area of ​​the existing memory is relatively large, which makes the area of ​​the memory large and occupies a relatively large physical area of ​​the system chip, which makes the production and test cost of the chip more and more high. Contents of the invention [0004] The ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/18G11C29/00G11C29/44
CPCG11C29/18G11C29/44G11C29/76
Inventor 钱海涛路利刚
Owner 上海燧原科技有限公司