134 results about "Logic mapping" patented technology

A method and apparatus for generating service state data and extensible meta-data information with a service oriented state data generator (SSDG) comprising: establishing a platform independent, extensible meta-data model for the meta-data information; obtaining state data schema based on a service state data description; defining an extensible set of meta-data attributes and templates corresponding to the meta data based on requirements of a service; and utilizing the meta-data model and based on the state data schema and the attributes, generating service state data based on the service state data schema; and The service state data including at least one of: state data, state data logical mapping, state data physical mapping, meta-data associated with the service state data and meta-data model correlations associated with the meta-data.

The invention relates to a realization method of fast frequency hopping communication. The method is based on the frame synchronization technology, synchronization information is contained in protocol frames, the confirmation is carried for three times to ensure that the normal and stable synchronization is built between a host machine and a sub machine, and further, the synchronization information enters the fast frequency hopping communication process. Two kinds of frames: protocol frames and data frames are used in the communication process. In the synchronization building and frequency hopping communication processes, the protocol frames and the data frames are respectively subjected to interweaving coding with higher error correcting and checking capability and Reed-Solomon (RS) coding (Reed-Solomon is a code invented by IrvingStoyReed and GustaveSolomon who are American mathematicians and engineers), the transmission reliability is ensured, and the anti-interference capability is improved. During the frequency hopping communication, chaos sequences generated based on logistic mapping (a logic mapping provided by PierreFran oisVerhulst) are adopted as frequency hopping patterns, so the randomness of the frequency hopping frequency is enhanced, and the anti-interference performance and the detection resistance performance of a frequency hopping radio station are improved.

Files that are mapped to a logical address range by a host become logically fragmented prior to being sent to a memory system. Subsequently, the logically fragmented portions are reassembled when they are stored in blocks in the memory system. The host supplies information to the memory system regarding file-to-logical mapping of data prior to sending the data. The memory selects storage locations for the data based on the files to which the data belong.

Disclosed is a novel circuit able to generate any logic combination possible as a function of the input logic signals. The circuit is described as a 2 input logistic map circuit but may be expanded to 3 or more inputs as required. Further disclosed is a universal logic array with variable circuit topology. A metallization layer and / or a via interconnection between cells in the array elements produce a circuit topology that implements a Boolean function and / or chaotic function and / or a logic function. The novel circuit provides a circuit topology for secure applications with no obvious physical correspondence between control signal values and input to output mapping. Further disclosed is a network which has a power signature independent of input signal state and output transition. This provides a very useful circuit to protect data from decryption from power signature analysis in secure applications.

The invention discloses a device and method for reducing power consumption of electronic equipment. The method comprises the following steps: obtaining the load state information of a load module; obtaining a voltage regulation signal according to the load state information and a pre-stored logic mapping query table; and regulating the magnitude of the input voltage of the input end of the load module according to the voltage regulation signal. In the invention, the mechanism of logic mapping query table is introduced; and when the load state changes, the magnitude of the input voltage of the load module can be automatically adjusted so as to save energy of the electronic equipment and achieve the purpose of reducing the power consumption.

The invention provides a data processing method for a flash memory device. The method comprises the following steps that: step S102, the flash memory device is scanned during the initialization, a logical block queue group and a spare empty physical block queue are established in a host computer, the logical block queue group is formed by queues composed of physical blocks with the same logical block number, and the spare empty physical block queue is composed of physical blocks with empty data spaces, in which data can be written; step S 104, the corresponding logical block queue group is searched by utilizing the logical block number according to the logical order of an upper-level system, the physical blocks in the logical block queue group are scanned, and the data in the flash memorydevice is processed by dint of the spare empty physical block queue according to the scanning result. Through the technical proposal of the invention, the logical mapping relation is simplified, the efficiency is improved, the data stability is ensured, and the service life of the flash memory is prolonged.

A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture is provided by associating a non-volatile universal memory to each logic element to enable cycle-by-cycle reconfiguration and logic folding, while remaining CMOS compatible. Through logic folding, significant logic density improvement and flexibility in performing area-delay tradeoffs are possible. NanoMap incorporates temporal logic folding during the logic mapping, temporal clustering and placement steps. NanoMap provides for automatic selection of a best folding level, and uses force-direct scheduling to balance resources across folding stages. Mapping can thereby target various optimization objectives and user constraints. A high-density, high-speed carbon nanotube RAM can be implemented as the universal memory, allowing on-chip multi-context configuration storage, enabling fine-grain temporal logic folding, and providing a significant increase in relative logic density.

A method for synthesizing video material includes utilizing control property of video server to record entrance point and exit point of material positioning and to map them to be logic mapping table for realizing logic synthesized effect, only modifying entrance point and exit point information on logic mapping table when material is required to be modified.

The invention provides a data reconstruction method and system, and a memory control circuit unit. The method comprises the steps of reading entity-logic mapping information in a rewritable nonvolatile memory module and time information corresponding to the entity-logic mapping information; sorting the entity-logic mapping information according to the time information corresponding to the entity-logic mapping information; and reconstructing a logic-entity mapping table according to the sorted entity-logic mapping information, and restoring the reconstructed logic-entity mapping table in a buffer memory. When the logic-entity mapping table is disrupted due to damage of the rewritable nonvolatile memory module, the logic-entity mapping table can be reconstructed according to the existing entity-logic mapping information, so that data stored in the rewritable nonvolatile memory module is identified.

The invention relates to a writing method of a TLC NAND FLASH solid-state disk. The solid-state disk comprises single-layer storage units and a three-layer storage unit. The method comprises the following steps of: S1, giving a writing instruction by a main control end of the solid-state disk and writing data into an SLC data buffer area; S2, when a preset quantity of single-layer storage units isfully written with the data, distributing a copy and write-back instruction; S3, writing the data in the preset quantity of single-layer storage units into the three-layer storage unit; and S4, updating a physical pair logic mapping tale corresponding to the three-layer storage unit. Through implementing the method, the data writing speed of the main control end can be improved, the reading timecan be shortened, the waste collection frequency of the solid-state disk can be decreased and then the access efficacy of the solid-state disk can be improved.

Techniques and structures are described which allow the detection of certain dependency conditions, including evil twin conditions, during the execution of computer instructions. Information used to detect dependencies may be stored in a logical map table, which may include a content-addressable memory. The logical map table may maintain a logical register to physical register mapping, including entries dedicated to physical registers available as rename registers. In one embodiment, each entry in the logical map table includes a first value usable to indicate whether only a portion of the physical register is valid and whether the physical register includes the most recent update to the logical register being renamed. Use of this first value may allow precise detection of dependency conditions, including evil twin conditions, upon an instruction reading from at least two portions of a logical register having an entry in the logical map table whose first value is set.

The invention discloses an MML-based (man-machine-language-based) method, server and system for configuring large volume data. The method includes: receiving template document transmitted by a client; analyzing data in the template document into batch MML commands according to a batch configuration command given by the client and prestored logic mapping document; executing the MML commands in batch, writing execution result information into the template document, and transmitting the template document to the client. The template document with written to-be-configured data is analyzed into MML commands for execution according to the prestored logic mapping document, original codes can be fully utilized, development efficiency is improved, and complexity is reduced.

The invention discloses a bar code data-based functional logic jumping method, client and system. The bar code data-based functional logic jumping method includes that a client acquires the bar code data of a target bar code, the bar code data of the target bar code comprises the bar code type and content data of the target bar code, and the bar code type comprises one-dimensional code or two-dimensional code; the client sends the bar code data to a server; the client acquires functional logic information returned from the server according to the bar code data of the target bar code and a preset bar code logic mapping relationship, wherein the functional logic information comprises a functional logic mark and logic content data corresponding to the bar code data of the target bar code; the client performs the corresponding functional logic according to the functional logic mark and logic content data. The bar code data-based functional logic jumping method, client and system are capable of reinforcing the bar code jumping ability and effectively widening the bar code application scene and use range.

The invention discloses an O2B intelligent searching method and system and belongs to the technical field of computer. The O2B intelligent searching method includes that carrying out logic association on words, and building a mapping lexicon; acquiring search content input by a user; carrying out semantic analysis on the search content input by the user; carrying out quadratic search on the semantic analysis result to obtain associated words, and using the associated words as search words; reasoning the search words in a rule base, and obtaining the search result; outputting the research result. The O2B intelligent searching method and system have beneficial effects that the improved O2B intelligent searching method is provided for overcoming the disadvantage that an existing search engine cannot meet the real demand of a user, through semantic analysis and logic mapping, the complicated and changing language is simplified, and the real demand of the user is translated precisely to provide precise search service.