NOR-type memory device and method of fabricating the same

Abstract

The invention provides an NOR-type memory element. The NOR-type memory element comprises a plurality of bit lines formed on a semiconductor substrate, a plurality of first isolation strips, a plurality of second isolation strips, a plurality of memory units formed between the first isolation strips and the second isolation strips, a plurality of word lines and a grounding layer formed above the first isolation strips and the second isolation strips which are formed on a semiconductor substrate. The semiconductor substrate defines a longitudinal direction, a lateral direction, a plurality of columns along the longitudinal direction, and a plurality of rows in the lateral direction. The first isolation strips and the second isolation strips extend in the longitudinal direction. Each memory cell corresponds to one of the columns and one of the rows. The memory units located on one side of each first isolation strip and the memory units located on the other side of the first isolation strip are arranged in a staggered mode.

Description

technical field [0001] The present invention relates to a NOR type memory element and a method for manufacturing the NOR type memory element, in particular to a NOR type memory element comprising a plurality of vertical current mode sector field effect transistors (fan-shaped field effect transistor, FanFET) and A method of manufacturing the NOR type memory element. Background technique [0002] see figure 1 and figure 2 , these figures schematically depict the vertical current mode sector field effect transistor 1 disclosed by US Patent Publication No. 2019123060A1. figure 1 It is an external view of the vertical current mode sector field effect transistor 1 . figure 2 for figure 1 A cross-sectional view of a medium vertical current mode Sector Field Effect Transistor 1 along line A-A. [0003] Such as figure 1 and figure 2 As shown, the conventional vertical current mode sector field effect transistor 1 includes a pillar 10 formed of semiconductor material, a gat...

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Problems solved by technology

However, 4F 2 The cell size is already the limit of these prior art NOR-type memory elements

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