UVM-based RFID tag chip verification device

Abstract

The invention discloses a UVM-based RFID tag chip verification device. The device comprises static components including a virtual interface module, a runtest calling method, a clock generation module,a DUT of an RFID tag and an EEPROM (Electrically Erasable Programmable Read Only Memory) module. Dynamic components comprise a base test module, a mycase module, an ENV module, a CONFIGURATION module, an agent module, a scoreboard module, a refresh module, a driver module and a monitor module. According to the method, the methodology of the UVM is adopted, so that the verification efficiency is higher. The hierarchy is clear, and the verification efficiency and credibility are improved by generating different test cases and a large number of randomized tests.

Description

technical field [0001] The invention belongs to the field of chip verification. In particular, it relates to a digital system verification method of a tag chip. Background technique [0002] With the complex functions of high-frequency or ultra-high-frequency RFID tag chip digital system modules, the difficulty of protocol implementation and verification increases, and the verification work has become an important link in the design of tag chips. [0003] Traditional verification methods require a large number of directional excitations, artificial detection of waveform verification, resulting in low verification efficiency. The present invention builds a brand new label chip digital verification system based on UVM (Universal Verification Methodology) methodology, completes the RTL function verification of the label chip, and effectively solves many drawbacks of traditional verification methods. Contents of the invention [0004] figure 2 The tree structure diagram for...

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Problems solved by technology

[0003] Traditional verification methods require a large number of directional excitations

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