Unlock instant, AI-driven research and patent intelligence for your innovation.

Method and system for bus cycle synchronization

A bus cycle, synchronization signal technology, applied in the direction of generation/distribution of signals, instruments, electrical digital data processing, etc., can solve the problem of affecting the synchronization performance of the master station and each device slave station, the period signal is not synchronized, the data cannot be triggered at the same time. problems with reading

Active Publication Date: 2022-07-26
SUZHOU WEICHUANG ELECTRICAL EQUIP TECH
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The clock source of the processor in the device not only uses a different clock source from the EtherCAT slave controller, but also is affected by factors such as ambient temperature and humidity. The clocks of the device and the EtherCAT slave controller will drift, resulting in internal operation of the device. The periodic signal of the EtherCAT slave station is not synchronized with the periodic synchronization signal controlled by the EtherCAT slave station.
In the same network, if multiple devices are not synchronized with their EtherCAT slave controllers, the synchronization performance between the master station and each device slave station will be affected, and real-time data cannot be triggered or read at the same time, seriously affecting the system. The real-time performance and the stability of the equipment

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and system for bus cycle synchronization
  • Method and system for bus cycle synchronization
  • Method and system for bus cycle synchronization

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0053] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present application.

[0054] In one embodiment, figure 1 It is a schematic flowchart of a method for bus cycle synchronization in one embodiment, refer to figure 1 , which provides a method for bus cycle synchronization. This embodiment is mainly applied to such as Figure 5 Taking the bus cycle synchronization device 220 in the example as an example...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present application relates to a method and system for bus cycle synchronization. The method includes: obtaining the first count value of the slave station controller in the current count period; obtaining the second count value of the device processor in the current count period; when the first count value is equal to the first preset value, generating a correction trigger signal; The second count value is corrected according to the correction trigger signal to obtain a third count value; when the third count value is greater than or equal to the second preset value, a device cycle synchronization signal is generated, and the device cycle synchronization signal carries the generation time; when the generation time When the error from the receiving moment of the received bus cycle synchronization signal is less than or equal to the preset error value, it is determined that the device processor is synchronized with the slave station controller. Based on the above method of bus cycle synchronization, the synchronization of the bus cycle synchronization signal and the device cycle synchronization signal is ensured, and the stability of real-time data transmission and reception between the device and the master station in the same network is improved.

Description

technical field [0001] The present application relates to the technical field of industrial Ethernet, and in particular, to a method and system for bus cycle synchronization. Background technique [0002] With the continuous development of modern industry, the increasingly complex industrial application environment puts forward high-speed and high-precision control requirements for equipment, and traditional analog, pulse, digital and other signals cannot meet the requirements. With the continuous development of modern communication technology, especially the emergence of industrial Ethernet, equipment is developing in the direction of digitization, networking and intelligence. EtheCAT is an industrial Ethernet field bus with the characteristics of fast transmission speed, high reliability, good real-time performance and precise synchronization, which is favored by equipment manufacturers at home and abroad. The EtherCAT bus is used to form a control network. The master sta...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/16G06F1/12
CPCG06F13/1689G06F13/1684G06F1/12
Inventor 胡智勇朱小超
Owner SUZHOU WEICHUANG ELECTRICAL EQUIP TECH