Semiconductor device
A semiconductor and device technology, applied in the field of semiconductor devices, can solve problems such as inability to easily cut processes, and achieve the effect of improving electrical characteristics
Pending Publication Date: 2021-03-16
SAMSUNG ELECTRONICS CO LTD
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Problems solved by technology
Cutting process cannot be easily performed due to structures such as TEG on the scribe lane
Method used
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[0010] The above and other aspects and features of the semiconductor device and the manufacturing method thereof will become easily understood from the above and other aspects and features of the semiconductor device and the manufacturing method thereof according to the following detailed description. It will be understood that, although the terms "first", "second" and / or "third" can be used, various elements, components, regions, layers, and / or portions, but these components, components, regions The layers and / or part should not be limited by these terms. These terms are only used to separate one element, assembly, region, layer or portion from another element, component, region, layer, or part of the part. Therefore, without departing from the teachings of the inventive concept, the first element, the first component, the first region, the first layer, or the first portion, or the first portion, can be referred to as the second element, the second component, and the second...
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A semiconductor device is provided. The semiconductor device includes a substrate having a chip region and a scribe lane region having first edges extending in a first direction and second edges extending in a second direction, a first insulating interlayer structure on the scribe lane region and including a low-k dielectric material, first conductive structures on a portion of the scribe lane region adjacent one of the first edges and each extending through the first insulating interlayer structure in a vertical direction and extending in the first direction, a second insulating interlayer onthe first insulating interlayer structure and including a material having a dielectric constant greater than that of the first insulating interlayer structure, first vias each extending in the firstdirection through the second insulating interlayer to contact one of the first conductive structures, and a first wiring commonly contacting upper surfaces of the first vias.
Description
[0001] The present application claims priority to Korean Patent Application No. 10-2019-011333, issued by the Korean Intellectual Property Office on September 16, 2019, which is included in this publication of this Korean Patent Application. Technical field [0002] Example embodiments of the present disclosure relate to semiconductor devices, more particularly, to DRAM devices. Background technique [0003] Wafer can include a plurality of chip regions and a tracking area around them, and a test element group (TEG) for testing the electrical characteristics of the elements on the chip region, the alignment key, etc., can be formed on the row channel . After forming a semiconductor chip on the wafer, a cutting process for cutting the wafer and the structure thereof can be performed by the row-channel region, so that the semiconductor chip can be divided. Due to the structure of the TEG on the row, the cutting process is not easily performed. Inventive content [0004] According t...
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IPC IPC(8): H01L27/108H01L23/528H01L21/8242
CPCH01L23/5283H10B12/34H10B12/315H10B12/053H10B12/482H10B12/485H01L23/544H01L2223/5446H01L2223/54426H10B12/0335H10B12/09H01L21/76813H01L21/76838H01L21/76897H01L21/76829H01L21/76H10B12/20H01L23/5226H01L23/528H01L22/32H01L23/5223H01L23/53295H01L21/31144H01L21/32139
Inventor 金俊澈洪相宇
Owner SAMSUNG ELECTRONICS CO LTD