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3D NAND etch

A technology of etching and etching film, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of uneven thickness of the gap, damage to the sidewall of the gap, etc.

Pending Publication Date: 2021-03-16
APPLIED MATERIALS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During the etch of thick stacks, the current etch process often damages the sidewalls of the gap, resulting in a gap thickness that is less uniform at the top of the stack than in the middle or bottom

Method used

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  • 3D NAND etch

Examples

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Embodiment Construction

[0012] Before describing several exemplary embodiments of the present disclosure, it is to be understood that the disclosure is not limited to the details of construction or process steps set forth in the following description. The disclosure is capable of other embodiments and of being practiced or being carried out in various ways.

[0013] As used in this specification and the appended claims, the term "substrate" means a surface or a portion of a surface on which a process acts. Those skilled in the art will also understand that a reference to a substrate may refer to only a portion of a substrate unless the context clearly dictates otherwise. Additionally, reference to depositing on a substrate can refer to both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0014] "Substrate" as used herein refers to any substrate or surface of material formed on a substrate on which film processing is performed during a manufacturin...

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Abstract

Methods of etching film stacks to from gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.

Description

technical field [0001] Embodiments of the present disclosure generally relate to etching methods for forming gaps or features in semiconductor devices. More particularly, embodiments of the present disclosure relate to etching methods for forming word lines in three-dimensional semiconductor devices. Background technique [0002] The semiconductor and electronics processing industries continue to strive for greater throughput while increasing the uniformity of layers deposited on substrates with greater surface areas. These same factors combined with new materials also provide a higher degree of circuit integration per substrate area. As the level of circuit integration increases, so does the need for greater uniformity and process control with respect to layer thickness. As a result, various techniques have been developed to deposit and etch layers on substrates in a cost-effective manner while maintaining control over the physical and chemical properties of the layers. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L21/027H01L21/3065H01L27/11556H01L27/11524H10B41/20H10B41/27H10B41/35H10B43/20H10B43/27
CPCH01L21/31144H10B41/27H10B43/27H01L21/0274H01L21/3065H01L21/76811H01L21/76813H01L21/76816H01L21/76828H10B41/35H01L21/02112H01L21/02063H01L21/0228H10B41/20H10B43/20
Inventor 江施施P·曼纳B·齐A·玛里克程睿T·北岛H·S·怀特塞尔H·王
Owner APPLIED MATERIALS INC