Non-volatile memory with selective interleaved coding based on block reliability

Abstract

In one embodiment, the disclosure teaches an apparatus including a memory array and a processor in communication with the memory array. The processor is configured to determine health scores of blocksof the memory array, where the health scores indicate the health of the blocks. The processor also is configured to receive data from a host, and select an interleaving scheme for programming the data based on the data type and a block to which the data is written based on the health scores. In one embodiment, sequential type data is written to unhealthy blocks and non-sequential data is writtento healthy blocks.

Description

Background technique [0001] The present disclosure relates to non-volatile memory, and more particularly to methods of writing data to different memory blocks. [0002] Non-volatile memory (NVM) systems, such as flash memory, have been widely used in consumer products. Flash memory systems are typically divided into partitions such as blocks and pages, which allow more efficient use of memory, where a block is the unit used for erase operations and a page is the unit used for read and write operations. Flash memory can also have single-level cells (SLCs) that store a single bit, and multi-level cells (MLCs) that store more than one bit. To ensure that data written to memory can be correctly read from memory, data is written using error correction coding (ECC) and / or parity bits, which are an essential part of any memory system. Therefore, the data to be written to the memory is encoded using the ECC scheme, and the encoded data and parity bits are written to the memory. The...

AI Technical Summary

Problems solved by technology

[0003] On the downside, NVM memory systems, such as NAND memory, suffer from bad cells and bad blocks

In NAND memory, blocks are known to wear out and become unreliable over time

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