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Interrupt processing method and device, electronic equipment and storage medium

A processing method and processor technology, applied in the computer field, can solve the problems that the lower half of the interrupt cannot be processed in time, and the interrupt processing efficiency is not high enough.

Pending Publication Date: 2021-05-11
珠海亿智电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide an interrupt processing method, device, electronic equipment and storage medium, aiming to solve the problem of insufficient interrupt processing efficiency caused by the failure to process the lower half of the interrupt in the prior art

Method used

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  • Interrupt processing method and device, electronic equipment and storage medium
  • Interrupt processing method and device, electronic equipment and storage medium
  • Interrupt processing method and device, electronic equipment and storage medium

Examples

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Embodiment 1

[0042] image 3 The implementation flow of the interrupt processing method provided by Embodiment 1 of the present invention is shown. For the convenience of description, only the parts related to the embodiment of the present invention are shown, and the details are as follows:

[0043] In step S301, before the first processor enters the idle state, the interrupt processing function linked list of the second processor is obtained.

[0044]The embodiments of the present invention are applicable to electronic equipment, and the electronic equipment includes a plurality of processors. When the electronic equipment is running, each processor is either executing instructions or is in an idle state. When processing interrupts, or running tasks, the processor is executing instructions; when no tasks and interrupts are being processed, the processor is idle. In general, in a multi-processor system, even in complex application scenarios, not all processors will run at full capacity a...

Embodiment 2

[0056] Figure 4 An example of the implementation process of the interrupt processing method provided by Embodiment 2 of the present invention is shown. For the convenience of description, only the parts related to the embodiment of the present invention are shown, and the details are as follows:

[0057] In step S401, before the first processor enters the idle state, the number of elements of the interrupt processing function linked list of each processor other than the first processor is counted;

[0058] In step S402, obtain the interrupt processing function linked list with the largest number of elements;

[0059] In step S403, it is judged whether the interrupt processing function linked list is not empty, if not empty, then execute step S404, if it is empty, then execute step S408;

[0060] In step S404, obtain a processing function from the interrupt processing function linked list, and delete the obtained processing function from the interrupt processing function link...

Embodiment 3

[0067] Figure 5 The structure of the interrupt processing device provided by the third embodiment of the present invention is shown. For the convenience of description, only the parts related to the embodiment of the present invention are shown, including:

[0068] A linked list acquisition unit 51, configured to acquire the interrupt processing function linked list of the second processor before the first processor enters the idle state;

[0069] A condition judging unit 52, configured to judge whether the interrupt processing function linked list satisfies a preset condition;

[0070] A function execution unit 53, configured to obtain a processing function from the interrupt processing function list for execution if the interrupt processing function linked list satisfies a preset condition, and delete the obtained processing function from the interrupt processing function linked list;

[0071] A task judging unit 54, configured to judge whether there is currently a ready t...

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Abstract

The invention is applicable to the technical field of computers, and provides an interrupt processing method and device, electronic equipment and a storage medium, and the method comprises: before a first processor enters an idle state, obtaining an interrupt processing function linked list of a second processor, and judging whether the interrupt processing function linked list meets a preset condition; if yes, obtaining one processing function from the interrupt processing function chain table to be executed, and deleting the obtained processing function from the interrupt processing function chain table; if the processing function is executed, judging whether a ready task exists or not; if yes, executing the ready task; and if not, skipping to the step of judging whether the interrupt processing function chain table meets a preset condition or not. Therefore, the timeliness of interrupt lower half part processing is improved, and the interrupt processing efficiency is improved.

Description

technical field [0001] The invention belongs to the technical field of computers, and in particular relates to an interrupt processing method, device, electronic equipment and storage medium. Background technique [0002] Multiprocessors are widely used in various high-end applications, such as consumer electronics, video security, intelligent hardware and other products. These application scenarios are often more complex. In addition to processing various tasks, the CPU also needs to handle interrupts from various devices. When the interrupt of the peripheral module arrives, the operating system needs to handle it in time, otherwise the overall performance of the system may be affected. The processing of each interrupt by the operating system can be divided into two steps, the first half and the second half. The upper part is used to register interrupts, mainly to obtain the interrupt number from the interrupt hanging register, add the handler corresponding to the interru...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48
CPCG06F9/4812Y02D10/00
Inventor 不公告发明人
Owner 珠海亿智电子科技有限公司
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