A phase-based on-chip bus scheduling device and scheduling method

Abstract

The invention relates to a phase-based chip on-chip bus scheduling device and scheduling method, including a phase generator and 1 to N-level transponders, wherein the second-level transponder is connected with two first-level transponders for connecting users Transponders, two 2nd transponders are connected to the 3rd level transponders, and so on. A number of first-level repeaters for connecting devices are connected to the N-th-level repeater, and the number of users or devices connected to each first-level repeater is equal, and the total number of users and devices is equal. The phase generator is used to generate phases and authorize access rights between users and devices. The invention controls the access authority through the phase, so that the sending request from the device to the user and the response to the sending request from the user to the device are completely fair, with less hardware requirements and resources, and the area and power consumption of the bus network are greatly reduced. Timely response, less response delay and other advantages.

Description

technical field [0001] The invention belongs to the technical field of chip design, and in particular relates to a phase-based chip on-chip bus scheduling device and a scheduling method. Background technique [0002] The functions and performance of the chip system have been greatly improved. How to build an effective and simple on-chip bus network is very critical in the design of large chips. Modern large-scale chips generally use traditional bus network structures, such as crossbar, mesh, butterfly, etc. In multi-core CPU chips, mesh networking is a heavily used on-chip bus. In GPU chip design, crossbar is a commonly used on-chip bus structure. The Mesh network is that each node is connected to all adjacent nodes, and its advantages are fast speed, regular structure, and easy layout implementation. In the Crossbar bus network, each device node is interconnected with all user nodes, unlike the mesh network, there are also connections between device nodes and user nodes....

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to overcome the defects of too large bus network area, too long bus network delay and too large power consumption caused by too many interconnected resources and hardware resources in the scheduling mechanism of the existing network bus, and to provide a network based on Phase chip on-chip bus scheduling device and scheduling method

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