Multifunctional test method for SOC chip multiplexing pin, device and system thereof
A multi-functional testing and functional testing technology, applied in the direction of error detection/correction, faulty computer hardware, instrument detection, etc., can solve the problems of crowding out the company's R&D resources, consuming the working time of engineers, and slow time progress
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specific Embodiment 1
[0026] According to the flowchart of an embodiment of the multifunctional testing method of a kind of SOC chip multiplexing pin of the present invention, this method comprises the steps:
[0027] S1: Receive the functional test instruction sent by the external control board.
[0028]The process of testing the function to be tested is started by the external control board, and the test of the function to be tested starts after receiving the function test instruction sent by the external control board. Wherein, when testing different functions to be tested, the first states of the first input and output ports are different, and the respective first states of the first input and output ports need to be configured through function test instructions. Therefore, the function test instruction includes: a function test case corresponding to the function to be tested, and the function test case includes respective first port states of a plurality of first input and output ports.
[00...
specific Embodiment 2
[0041] figure 2 A flow chart of an embodiment of a multifunctional testing method of a SOC chip multiplexing pin is shown, the method may include the following steps:
[0042] SS1: Receive N functional test instructions sent by the external control board in sequence.
[0043] When there are N functions to be tested, the sequence of N function test processes can be controlled through the external control board. Specifically, when testing a certain function to be tested, the function test instruction corresponding to the function to be tested sent by the external control board is received. The function test instruction corresponding to the next function to be tested, thereby starting a new round of function test for the next function to be tested.
[0044] SS2: According to the multifunctional testing method of the multiplexing pins of the SOC chip as described above, the N functions to be tested are tested in turn, so as to obtain N test information corresponding to the N fu...
specific Embodiment 3
[0050] In addition to the above method, the present invention also provides a multifunctional testing device 11 for SOC chip multiplexing pins, image 3 A structural diagram of an embodiment of a multifunctional testing device for multiplexing pins of an SOC chip according to the present invention is shown. The device 11 includes a receiving module 111, an automatic bridge module 112 and a result output module 113.
[0051] The receiving module 111 is used for receiving function test instructions sent by the external control board, receiving interaction data between the platform board to be tested and the external device, and receiving test information corresponding to the function to be tested fed back by the platform board to be tested. Wherein, the function test instruction includes: a function test case corresponding to the function to be tested, and the function test case includes respective first port states of a plurality of first input and output ports. The multiple f...
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