Semiconductor structure and fabrication method of semiconductor structure

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve the problems of long area of ​​conductive channel and limit the development of semiconductor structure, so as to increase the length of conductive channel, reduce the occupied area, The effect of improving performance

Active Publication Date: 2022-04-05
CHANGXIN MEMORY TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0002] In the semiconductor structure in the related art, the NFET and PFET both adopt horizontally placed surround gate transistors. Since the horizontally arranged conductive channel occupies a long area in the horizontal direction, the development of the semiconductor structure is limited.

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  • Semiconductor structure and fabrication method of semiconductor structure
  • Semiconductor structure and fabrication method of semiconductor structure
  • Semiconductor structure and fabrication method of semiconductor structure

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Embodiment Construction

[0099] Typical embodiments embodying the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention can have various changes in different embodiments without departing from the scope of the present invention, and that the description and drawings therein are illustrative in nature and not intended to limit the present invention. invention.

[0100] In the following description of various exemplary embodiments of the present disclosure, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of example various exemplary structures, systems and steps which may implement aspects of the present disclosure . It is to be understood that other specific arrangements of components, structures, exemplary devices, systems and steps may be utilized and structural and functional modifications may be made without departing from the scope of the ...

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Abstract

The invention relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method of the semiconductor structure. The semiconductor structure includes: a substrate; a first transistor, the first transistor is located on the substrate; a second transistor, the second transistor is located above the first transistor; a gate structure, the gate structure includes a connected first gate layer and The second gate layer, the first gate layer is arranged around the first transistor, and the second gate layer is arranged around the second transistor; wherein, the extension direction of the first transistor and the extension direction of the second transistor are both perpendicular to the substrate. The first transistor and the second transistor are stacked in a vertical direction, which increases the conductive channel length of the semiconductor structure and reduces the occupied area of ​​the semiconductor structure, thereby improving the performance of the semiconductor structure.

Description

technical field [0001] The invention relates to the technical field of performance testing, in particular to a semiconductor structure and a manufacturing method of the semiconductor structure. Background technique [0002] In the semiconductor structure in the related art, both the NFET and the PFET adopt horizontal surrounding gate transistors. Since the horizontal conductive channel occupies a very long area in the horizontal direction, the development of the semiconductor structure is limited. Contents of the invention [0003] The invention provides a semiconductor structure and a manufacturing method of the semiconductor structure to improve the performance of the semiconductor structure. [0004] According to a first aspect of the present invention, a semiconductor structure is provided, comprising: [0005] Substrate; [0006] a first transistor, the first transistor is located on the substrate; [0007] a second transistor, the second transistor is located abov...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L27/092H01L21/8238
CPCH01L27/0922H01L21/823807H01L21/823828H01L21/823885
Inventor张魁应战
OwnerCHANGXIN MEMORY TECH INC