Manufacturing method of LDMOS device
A manufacturing method and device technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems affecting the conduction channel length of LDMOS devices, the stability of threshold voltage leakage current, the stability of electrical parameters affecting LDMOS devices, and the occurrence of Deviation and other problems, to achieve the effect of reducing graphic alignment, reducing overlay error, and reducing position deviation
Pending Publication Date: 2020-09-15
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
However, when the first patterned photoresist layer and the second patterned photoresist layer are formed, the position of the pattern between them is more likely to deviate, that is, an overlay error will occur, and therefore, it will affect the LDMOS The stability of the electrical parameters of the device, for example, affects the stability of the conduction channel length, threshold voltage and leakage current of the LDMOS device, etc.
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[0030] The manufacturing method of the LDMOS device proposed by the present invention will be further described in detail below with reference to the drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.
[0031] Please refer to figure 1 , which is a schematic flowchart of a method for manufacturing an LDMOS device provided by an embodiment of the present invention. like figure 1 As shown, the present invention provides a method for manufacturing an LDMOS device, comprising:
[0032] Step S1: providing a semiconductor substrate;
[0033] Step S2: forming a drift region of the first conductivity type in the semiconductor substrate;
[0034] Step S3: forming a patterned photo...
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Abstract
The invention provides a manufacturing method of an LDMOS device. The manufacturing method comprises the following steps: forming a drift region of a first conductive type in a semiconductor substrate; then, forming a graphical photoresist layer on the semiconductor substrate, and exposing part of the drift region out of the graphical photoresist layer; and then, by taking the graphical photoresist layer as a mask, executing an ion implantation process on the exposed drift region to form a well region of a second conductive type. Namely, the well region is positioned in the drift region; in the process of forming the well region and the drift region, only the position of the well region needs to be defined through the graphical photoresist layer; therefore, the one-time graphical pattern alignment of the photoresist layer can be reduced, the position deviation between the well region and the drift region can be reduced, the overlay error between the well region and the drift region canbe reduced, and the stability of the conductive channel length, the threshold voltage and the leakage current of the LDMOS device can be improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing an LDMOS device. Background technique [0002] Because lateral double diffusion MOS (LDMOS) devices have high breakdown voltage and are compatible with complementary metal oxide semiconductor (CMOS) processes, they are widely used in power devices. The existing method for manufacturing an LDMOS device generally includes forming a first patterned photoresist layer on a semiconductor substrate, and the first patterned photoresist layer exposes a part of the semiconductor substrate, and then, performing ion implantation, forming a well region in the exposed semiconductor substrate, and then forming a second patterned photoresist layer on the semiconductor substrate, the second patterned photoresist layer exposed The portion of the semiconductor substrate outside the well region is then ion-implanted to form a drift region in the expose...
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IPC IPC(8): H01L29/66H01L29/06
CPCH01L29/66681H01L29/0684
Inventor刘长振令海阳刘宪周
OwnerSHANGHAI HUAHONG GRACE SEMICON MFG CORP