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Video image display processing control device and method and display terminal

A technology for display processing and video images, applied in image communication, color signal processing circuits, televisions, etc., can solve the problems of not being able to support rotation, not being able to realize rotating display, not being able to realize frame changing, etc., and achieve the effect of low cost

Pending Publication Date: 2021-07-16
ARKMICRO TECH
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  • Abstract
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  • Claims
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AI Technical Summary

Problems solved by technology

[0004] In the existing technical solution, in the low-cost single display chip, because there is no frame buffer, it cannot realize frame changing, nor can it support functions such as rotation, and OSD or AOSD also cannot realize the function of rotating display
In order to realize the aforementioned functions, it is only possible to use the CPU for software rotation or special GPU for rotation in a high-cost integrated CPU system, and at the same time call the LCD controller that consumes a lot of resources to perform frame rate conversion and realize OSD and AOSD superimposition Features as shown on images, so not great value for money

Method used

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  • Video image display processing control device and method and display terminal
  • Video image display processing control device and method and display terminal
  • Video image display processing control device and method and display terminal

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Embodiment Construction

[0037]The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0038] like figure 1 As shown, a video image display processing control device provided by the present invention includes: an input decoding module Input Decoder, a front-end scaling engine module Pre_Scaler, a first YCbCr to RGB module Ycbcr2rgb1, a first layer superposition module Blend1, an RGB to YCbCr Module Rgb2ycbcr, first selector, rotation control module Rotate_ctl, frame buffer controller Memory Controller, arbiter Arbiter, post-scale scaling engine m...

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Abstract

The invention provides a video image display processing control device. The device comprises an input decoding module, a pre-stage scaling engine module, a first YCbCr-to-RGB module, a first layer superposition module, an RGB-to-YCbCr module, a first selector, a rotation control module, a frame buffer controller, an arbiter, a post-stage scaling engine module, a second selector, a second YCbCr-to-RGB module, a second layer superposition module, an AOSD / OSD module, a third selector and a time schedule controller. According to the selection control signal, the layer data output by the OSD / AOSD module is overlapped on the image data before the rotation processing or the image data after the post-scaling processing. The device does not need a high-cost integrated CPU (Central Processing Unit) large system, and is low in cost and good in image display processing effect.

Description

technical field [0001] The present invention relates to the technical field of digital image processing, in particular to a video image display processing control device, method and display terminal. Background technique [0002] In the fields of in-vehicle multimedia systems and surveillance cameras, the application of digital images is becoming more and more extensive, and the requirements for video image quality are getting higher and higher. In display chips such as monitors, it is a trend for video sources to develop from traditional standard definition to high definition. In traditional single display chips of this type, the received input signal (such as ITU656 / ITU601 / RGB888, etc.) After generating a series of timing sequences that match the screen, these chips usually do not have a frame buffer, that is, the output frame rate is consistent with the input frame rate. When the input is a standard-definition CVBS signal, since the input frame rate is 50 / 60Hz, The outpu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N5/262H04N5/265H04N7/01H04N9/64H04N7/18
CPCH04N5/262H04N5/2628H04N5/265H04N7/01H04N9/64H04N7/18
Inventor 袁扬智韦毅刘俊秀
Owner ARKMICRO TECH
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