Bit line structure and semiconductor memory

Abstract

The invention relates to a bit line structure and a semiconductor memory. The bit line structure comprises a first bit line array and a second bit line array; the first bit line array comprises a plurality of first bit lines extending in the Y direction, and the plurality of first bit lines have the same length and are aligned in the X direction; the second bit line array comprises a plurality of second bit lines extending in the Y direction, and the plurality of second bit lines have the same length and are aligned and arranged in the X direction; the first bit line array and the second bit line array are not aligned in the X direction, and the X direction is perpendicular to the Y direction. By making the first bit line array and the second bit line array not aligned in the X direction, a larger setting space is provided for the bit line contact structure in a horizontal plane, so that the cross section area of the bit line contact structure can be enlarged, the contact resistance between the bit line contact structure and bit lines is reduced, and the induction margin and the charging and discharging speed of the device are improved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a bit line structure and a semiconductor memory. Background technique [0002] The continuous development of science and technology has made people have higher and higher requirements for semiconductor technology, and the area of ​​semiconductor devices has been continuously reduced. Therefore, higher requirements have been put forward for the precision and accuracy of semiconductor manufacturing processes. Semiconductor memory is a kind of memory accessed by semiconductor circuits, among which Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM) is widely used in various fields due to its fast storage speed and high integration. [0003] DRAM includes multiple repeated memory cells. As the size of DRAM continues to shrink and the degree of integration continues to increase, the feature size and cell area of ​​DRAM will decrease, so the area of ​​the bit line contact st...

AI Technical Summary

Problems solved by technology

[0004] Based on this, it is necessary to provide a bit line structure and a semiconductor memory for the problem of insufficient sensing margin and insufficient charge and discharge speed caused by excessive contact resistance.

Images