Data writing method, data reading method and first-in first-out memory

A first-in-first-out, data writing technology, applied in the input/output process of data processing, data transformation, electrical digital data processing and other directions, can solve the problems of increasing chip area, different data, waste of resources, etc. The effect of chip area, resource saving and quantity reduction

Pending Publication Date: 2021-10-08
HUNAN GOKE MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in different application scenarios, the bit width of the data to be processed may be different. In this case, it is necessary to add FIFO memories of different specifications.
However, due to the different bit widths of the data, adding too many storage units such as FIFO memories of different specifications will lead to a series of problems such as waste of resources and increase in chip area.

Method used

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  • Data writing method, data reading method and first-in first-out memory
  • Data writing method, data reading method and first-in first-out memory
  • Data writing method, data reading method and first-in first-out memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] figure 1 It is a schematic flowchart of a data writing method provided by an embodiment of the present disclosure. Such as figure 1 As shown, the method includes:

[0053] S101. Determine the target number of write interfaces to be enabled according to the working mode of the FIFO memory;

[0054] Specifically, the FIFO memory receives raw data in different data formats in different application scenarios, and each application scenario corresponds to a different working mode, and the number of write interfaces enabled in each working mode is different.

[0055]S102. Split the original data to be written into a target number of sub-data according to the reference bit width of the FIFO memory;

[0056] During specific implementation, the reference bit width of the FIFO memory is fixed, the depth of the FIFO memory is also fixed, and the reference bit width of the write interface and the FIFO memory is also consistent. After receiving the original data to be written, th...

Embodiment 2

[0091] Figure 4 It is a schematic flowchart of a data readout method provided by an embodiment of the present disclosure. Such as image 3 As shown, the method includes:

[0092] S401. Determine the target number of readout interfaces to be enabled according to the working mode of the FIFO memory;

[0093] Specifically, the FIFO memory can read raw data in different data formats in different application scenarios, each application scenario corresponds to a different working mode, and the number of readout interfaces enabled in each working mode is different.

[0094] S402. Read out a target number of sub-data from the first-in-first-out memory through a target number of read interfaces;

[0095] During specific implementation, in order to ensure that the read data is the same as the original data, it is necessary to read the sub-data to be read from multiple read interfaces at the same time. The number of enabled read interfaces is the same as the number of sub-data to be...

Embodiment 3

[0115] The embodiment of the present disclosure also discloses a first-in first-out memory, the bit width of the first-in first-out memory is a reference bit width;

[0116] The first-in-first-out memory includes multiple write interfaces and multiple read interfaces;

[0117] The first-in-first-out memory includes a plurality of working modes, and the working modes are used to determine the target number of writing interfaces or reading interfaces to be enabled.

[0118] To sum up, the FIFO memory provided by the embodiments of the present disclosure determines the number of write interfaces or read interfaces that need to be enabled by judging the working mode of the FIFO memory, and splits the data into data with the same format as the interface. The data size is written to or read from FIFO memory. Through the above solution, the present disclosure realizes the multiplexing of FIFO memory, which can meet the needs of different application scenarios, reduces the number of ...

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Abstract

The embodiment of the invention discloses a data writing method, a data reading method and a first-in first-out memory, and the data writing method comprises the steps: determining a target number of to-be-started writing interfaces according to a working mode of the first-in first-out memory; splitting to-be-written original data into a target number of sub-data according to the reference bit width; and writing the target number of sub-data into the first-in first-out memory through the target number of write-in interfaces. The data reading method comprises the steps of determining a target number of to-be-started reading interfaces according to a working mode of a first-in first-out memory; reading the target number of to-be-read sub-data from the first-in first-out memory through the target number of read-out interfaces; and splicing the target number of sub-data into original data. According to the invention, one first-in first-out memory is utilized to meet the requirements of different application scenes, the number of first-in first-out memories in a chip is reduced, resources are saved, the area of the chip is reduced, and meanwhile, expansion of various bit widths and depths can be carried out.

Description

technical field [0001] The invention relates to the field of data storage, in particular to a data writing method, a data reading method and a first-in-first-out memory. Background technique [0002] First-In-First-Out (First Input First Output, FIFO) memory is a commonly used data cache unit, widely used in various chips, mainly used for caching continuous data streams and centrally entering and storing data, which can ensure The correctness of data and the realization of high-speed pipeline operation of the system. However, in different application scenarios, the bit width of the data to be processed may be different. In this case, it is necessary to add FIFO memories of different specifications. However, due to the different bit widths of the data, adding too many storage units such as FIFO memories of different specifications will lead to a series of problems such as waste of resources and increase in chip area. Contents of the invention [0003] In view of the above...

Claims

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Application Information

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IPC IPC(8): G06F3/06G06F5/06
CPCG06F3/0626G06F3/0638G06F3/06G06F5/06
Inventor 金武王洪曾纪国
Owner HUNAN GOKE MICROELECTRONICS
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