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Continuous time linear equalization circuit with programmable gains

A linear equalization, circuit technology, applied in circuits, amplifiers with semiconductor devices/discharge tubes, electronic switches, etc., can solve problems such as inability to provide sufficient gain or equalization

Pending Publication Date: 2021-11-23
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Often one stage does not provide enough gain or equalization

Method used

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  • Continuous time linear equalization circuit with programmable gains
  • Continuous time linear equalization circuit with programmable gains
  • Continuous time linear equalization circuit with programmable gains

Examples

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Embodiment Construction

[0016] It will be readily appreciated that the components of the embodiments as generally described herein and illustrated in the drawings can be arranged and designed in a variety of different configurations. Accordingly, the following more detailed description of various embodiments as represented in the figures is not intended to limit the scope of the present disclosure, but is merely representative of various embodiments. While various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0017] The present invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the inventions. The described embodiments are to be considered in all respects as illustrative only and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by this detailed description. All changes that fall within the equ...

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PUM

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Abstract

A continuous time linear equalization (CTLE) circuit is disclosed. The CTLE circuit includes an input port, an output port, a first differential transistor pair coupled to the input port and the output port and a second differential transistor pair. The CTLE circuit further includes a first degenerative impedance circuit coupled between the first differential transistor pair and ground. The first degenerative impedance includes switchable components to vary impedance of the first degenerative impedance circuit. The CTLE circuit also includes a second degenerative impedance circuit coupled between the second differential transistor pair and ground. The second degenerative impedance includes switchable components to vary impedance of the second degenerative impedance circuit, wherein the resistive part of the impedance of the first degenerative impedance circuit is equal to the impedance of the second degenerative impedance circuit.

Description

technical field [0001] It relates to a continuous-time linear equalization circuit with programmable gain. Background technique [0002] Wired communication refers to the transmission of data via wire-based communication techniques. In general, wireline communication is considered the most stable of all types of communication services. Such as Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), DisplayPort (DP), Peripheral Component Interconnect Express (PCIe), Thunderbolt (Thunderbolt), Converged Input Output (CIO) and any other high speed broadband wired communication Broadband wireline data communication systems such as the NXP require multiple processing stages within their electronic circuitry. [0003] The wideband data communication system circuitry may include several stages including modules for equalizing, amplifying and / or redriving the signal for each data channel. Often one stage doesn't provide enough gain or equalization. In such multi...

Claims

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Application Information

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IPC IPC(8): G05F1/56
CPCG05F1/561H04L25/03878H04L25/03133H04L25/0272H03F3/45085H03F3/45183H03F2203/45101H03F3/211H03F2203/21142H03F2203/21106H03F2203/45458H03F2203/45464H03F2203/45466H03F2203/45498H03F2203/45496H03F2203/45504H03F2203/45502H04L25/03012H03K17/687H03K17/60
Inventor 张旭赛马克·德尔沙特伯
Owner NXP BV
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