Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The semiconductor structure comprises a substrate which is provided with a plurality of fin parts which are separated from one another; a gate structure is located on the substrate, stretches across the fin part and covers part of the side wall and the top surface of the fin part; source-drain doping layers are located on the two sides of the gate structure; a conducting layer is located on one side or two sides of the gate structure and connected with the source-drain doped layers, and the top surface of the conducting layer is lower than the top surface of the gate structure; and a conductive plug located on the conductive layer, wherein the conductive plug is in contact with a part of the surface of the conductive layer. A top surface of the conductive layer is lower than a top surface of the gate structure, and the conductive plug is on a part of the surface of the conductive layer. The projection of the finally formed conductive layer and the conductive plug on the gate structure is small, so that the stray capacitance between the conductive layer and the gate structure and between the conductive plug and the gate structure is reduced, and the performance of the finally formed semiconductor structure is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the development of integrated circuits to ultra-large-scale integrated circuits, the circuit density inside the integrated circuit is increasing, and the number of components contained in the integrated circuit is also increasing, and the size of the components is also reduced. As the size of the semiconductor structure decreases, the channel of the device in the semiconductor structure shortens accordingly. Due to the shortening of the channel, the gradual channel approximation is no longer valid, and various unfavorable physical effects (especially the short channel effect) are highlighted, which degrades the performance and reliability of the device and limits the further reduction of the device size. [0003] In order to reduce a series of problems caused by the sho...

AI Technical Summary

Problems solved by technology

[0005] However, in the semiconductor structure formed in the prior art, the parasitic capacitance between the gate and the metal layer is too large, which affects the performance of the formed semiconductor structure

Images