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Method, device and storage medium for determining chip testable design

A technology for test design and method determination, applied in the computer field, can solve problems such as high time cost and repeated and complicated operations, and achieve the effects of simplified operation, high efficiency, and reduced time cost

Active Publication Date: 2022-06-28
奇捷科技(深圳)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the embodiments of the present application is to provide a method for determining the testable design of a chip, aiming at solving the problems of repetitive and complicated operations and high time costs when manually updating the testable design

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  • Method, device and storage medium for determining chip testable design
  • Method, device and storage medium for determining chip testable design
  • Method, device and storage medium for determining chip testable design

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Embodiment Construction

[0019] In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the present application will be described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

[0020] It will be understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms unless otherwise specified. These terms are only used to distinguish a first element from another element. For example, a first script could be referred to as a second script, and similarly, a second script could be referred to as a first script, without departing from the scope of this application.

[0021] An application environment of the method for determining a testable desi...

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Abstract

This application is applicable to the field of computer technology, and provides a method, device and storage medium for determining the testable design of a chip. The method includes: obtaining the register transfer level information corresponding to the circuit of the initial version of the chip; obtaining the target version of the chip The register transfer level information corresponding to the circuit; according to the register transfer level information corresponding to the initial version circuit and the register transfer level information corresponding to the target version circuit, determine the register transfer level difference information group; according to the register transfer level difference information group As well as the initial version circuit, a testable design of the target version circuit of the chip is determined. This application obtains the circuit difference by comparing the register transmission level information of the previous and later versions of the circuit, and automatically modifies and generates the testable design of the target version based on it. Compared with manually updating the testable design, the efficiency and accuracy are higher, effectively reducing It reduces the time cost of chip version update and simplifies the operation of chip version update.

Description

technical field [0001] The present application belongs to the field of computer technology, and in particular, relates to a method, device and storage medium for determining a testable design of a chip. Background technique [0002] Chip has become the core component of modern electronic equipment, especially electronic equipment with computer functions, and has an unshakable absolute core position. In the process of chip development, the expansion of the design scale and the reduction of the manufacturing process are the general trends of the development wave. [0003] With the advent of the above-mentioned development trend, it is found that any slight physical damage during the chip manufacturing process may cause the fabricated chip to fail to work properly. Therefore, chips must pass strict error checking after fabrication. In order to facilitate detection, engineers will add a testable design to the circuit in the design stage, and improve the testability of the chip...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/3308
CPCG06F30/3308
Inventor 魏星刁屹林德基
Owner 奇捷科技(深圳)有限公司