Fin transistor with semiconductor spacer

Abstract

The invention relates to a fin transistor with semiconductor spacers. In a general aspect, a transistor may include a fin having a proximal end and a distal end. The fin may include a dielectric portion extending longitudinally between a proximal end and a distal end, and a semiconductor layer disposed on the dielectric portion. The semiconductor layer may extend longitudinally between a proximal end and a distal end. The transistor may also include a source region disposed at the proximal end of the fin, and a drain region disposed at the distal end of the fin. The transistor may also include a gate dielectric layer disposed on the channel region of the semiconductor layer. A channel region may be disposed between the gate dielectric layer and the dielectric portion. The channel region may be disposed longitudinally between the source region and the drain region. The transistor may also include a conductive gate electrode disposed on the gate dielectric layer.

Description

technical field [0001] This specification relates to field effect transistor (FET) devices, and more particularly, to field effect transistors including fins (eg, FinFETs) with semiconductor spacers. Background technique [0002] In some applications, transistor devices (and other electronic devices) implemented on semiconductor dies may be formed in a stacked configuration. For example, semiconductor processing operations, which may be referred to as front-end-of-line (FEOL) processing, may be performed to produce a first set of devices (eg, transistors, circuits, etc.) on a semiconductor die. After such FEOL processing is completed, additional semiconductor processing operations (which may be referred to as back-end-of-line (BEOL) processing) may be performed to produce a first stack (formed on, disposed on, etc.) on the devices produced during the associated FEOL processing. Two sets of devices. For example, devices produced during a BEOL process may be formed (eg, dire...

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Problems solved by technology

[0003] However, in the current implementation, transistors formed during BEOL processing (e.g., laterally diffused transistors, planar transistors, etc.), referred to herein as BEOL transistors, may have certain disadvantages

For example, current methods for producing BEOL transistors may result in large semiconductor die sizes (e.g., to achieve the desired drive current for BEOL transistors) and / or may result in insufficient drive current per unit device area

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