PLL circuit and control method thereof

Abstract

The DCO (200) is configured so as to form a ring oscillator and oscillate at a frequency corresponding to the control code DCO - CODE when the selection signal SEL is in an active period, and so as to be able to inject an injection edge INJ - EDGE based on a reference clock CLK - REF when the selection signal SEL is in an inactive period. During a start-up period of the PLL circuit (100), the controller (500) repeats a cycle including: (i) activating the selection signal SEL, oscillating the DCO (200), and performing a phase comparison between an oscillator clock and a reference clock CLK - REF; and (ii) invalidating the selection signal, stopping the DCO (200), and updating the control code by a dichotomy lookup based on the result of the phase comparison.

Description

technical field [0001] The present disclosure relates to a PLL (Phase Locked Loop) circuit. Background technique [0002] For various ICs (Integrated Circuits), a frequency synthesizer is used that generates a clock of an arbitrary frequency from a reference clock. As such a frequency synthesizer, a PLL circuit is widely used. figure 1 (a)~ figure 1 (c) is a block diagram illustrating the basic structure of the PLL circuit. [0003] exist figure 1 In (a) of , the analog PLL circuit 1 is shown. The analog PLL circuit 1 includes a phase comparator (PFD: Phase Frequency Detector) 10 , a charge pump circuit 12 , a low-pass filter 14 , a voltage controlled oscillator (VCO: Voltage Controlled Oscillator) 16 , and a frequency divider 18 . VCO16 with an analog control voltage V CTRL the corresponding frequency to oscillate. The output clock CLK_VCO of the VCO 16 is divided by 1 / N by the frequency divider 18 . The phase comparator 10 detects the phase difference between the ...

AI Technical Summary

Problems solved by technology

[0004] figure 1 The analog PLL circuit 1 of (a) has been used for a long time in various applications and has high reliability, but there is a problem that the chip size becomes large due to the loop filter

Images