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Method for sanding and receiving data based on synchronous serial interface in digital signal processor

A technology of synchronous serial and receiving methods, applied in the direction of synchronous devices, digital transmission systems, electrical components, etc., can solve the problem of fundamentally ensuring the reliability of synchronous data transmission and reception, and the detection of limited state of data transmission and reception synchronization capacity and other issues to achieve the effects of reduced occupancy rate, good CPU resource distribution, high efficiency and reliability

Inactive Publication Date: 2006-08-09
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that the synchronization of data transmission and reception is limited by the DSP's ability to detect the state of the internal DMA controller and the synchronous serial interface, making it difficult to fundamentally guarantee the reliability of synchronous data transmission and reception.

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  • Method for sanding and receiving data based on synchronous serial interface in digital signal processor
  • Method for sanding and receiving data based on synchronous serial interface in digital signal processor
  • Method for sanding and receiving data based on synchronous serial interface in digital signal processor

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Embodiment Construction

[0027] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0028] figure 1 It is an embodiment flowchart of the method of the present invention. according to figure 1 , the method described in the first step of the present invention also includes dividing the format of the sent or received data, dividing the sent or received data in units of data blocks, each data block includes a plurality of data frames, and each frame includes a plurality of Time slots, each time slot consists of a number of bits. If the size of the data block and the division of data within the block are determined for each data transmission or reception, the data transfer synchronization used when sending and receiving data through the synchronous serial interface of the digital signal processor (DSP) can be set in step 2 signal, and set synchronous control interrupt signal. Based on the division of the data format of the abo...

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Abstract

When using synchronous serial interface of digital signal processor (DSP) sends and receives data, the data transmission signal, the synchronous control interrupt signal, the data send out buffer and data receive buffer are setup. Under control of the transmission synchronous signal, the send module of the synchronous serial interface and the DMA send data controller sends data; the receive module of the synchronous serial interface and the DMA receive data controller receives data. The synchronous controlled interrupt signal controls the data send and data receive carried out by the DMA controller and the synchronous serial interface in DSP synchronously as well as monitors the data processing carried out by CPU in DSP. This mechanism lowers rate of occupying CPU and the data transmission can be returned to normal automatically when timing signal error or frame synchronous signal error occurs.

Description

technical field [0001] The invention relates to a data sending and receiving method in a communication system, in particular to a data sending and receiving method based on a digital signal processor synchronous serial interface. Background technique [0002] In computer and communication systems, the main purpose of a digital signal processor (DSP) is to process digital signals. For most DSPs, it usually includes a central processing unit (CPU) for processing digital data algorithms and a direct memory access (DMA) controller for data transfer. At the same time, as a DSP input and output data channel, most of the DSP's synchronous serial interfaces have the ability to work in multiple channels, for example, any time slot can be set to send and receive data. Under the coordinated management of the DSP's internal CPU, the synchronous serial interface can cooperate with the DMA controller to receive and send synchronous serial data. There are usually two methods for sending ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00
Inventor 李东滨
Owner HUAWEI TECH CO LTD