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Optimization of N-base typed arithmetic expressions

A technique of expressions and arithmetic, applied in the field of computer systems, to solve problems such as increasing execution speed

Inactive Publication Date: 2006-11-29
SUN MICROSYSTEMS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Furthermore, existing techniques require performing such transformations to increase execution speed

Method used

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  • Optimization of N-base typed arithmetic expressions
  • Optimization of N-base typed arithmetic expressions
  • Optimization of N-base typed arithmetic expressions

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Embodiment Construction

[0093] Those of ordinary skill in the art will appreciate that the following description of the invention is illustrative only. Other embodiments of the invention will become apparent to those skilled in the art having the benefit of the description of the invention.

[0094] The present invention relates to computer systems. In particular, the invention relates to the optimization of arithmetic expressions of n-radix types. The present invention further relates to a machine-readable medium on which are stored (1) design parameters of the present invention and / or (2) program instructions for performing operations on a computer using the present invention. Such media include, for example, magnetic tapes, magnetic disks, optically readable media such as CD ROMs, and semiconductor memories such as PCMCIA cards. The media can also take the form of larger or fixed objects such as a hard drive or computer RAM.

[0095] Resource constrained devices are generally considered to be r...

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Abstract

A method for arithmetic expression optimization includes receiving a first instruction (80) defined for a first processor having a first base, the first instruction (80) including an operator and at least one operand, converting the first instruction (80) to a second instruction (88) optimized for a second processor having a second base when all operands do not carry potential overflow (82) or when the operator is insensitive to overflow, the second base being smaller than the first base, and converting to a wider base a third instruction (86) that is the source of the overflow when the at least one operand the potential for overflow and when the operator is sensitive to overflow. An apparatus for arithmetic expression optimization includes at least one memory having program instructions and at least one processor configured to use the program instructions to receive a first instruction (80) defined for a first processor having a first base, convert the first instruction to a second instruction (88) optimized for a second processor having a second base when every one of the at least one operand does not carry potential overflow (82) or when the operator is insensitive to overflow, the second base being smaller than the first base, and convert to a wider base a third instruction (86) that is the source of the overflow when the at least one operand the potential for overflow (84) and when the operator is sensitive to overflow.

Description

[0001] Cross-Referenced Related Applications [0002] This application concerns the following applications: [0003] The filing date is February 2, 1999, the applicants are Susser and Schwabe, and the US patent application titled "Object-Oriented Instruction Set for Resource-Constrained Devices" is filed. [0004] The filing date is April 15, 1997, the applicants are Levy and Schwabe, and the US patent application titled "Virtual Machine with Securely Distributed Bytecode Verification (Virtual Machine with Securely Distributed Bytecode Verification)" is filed. technical field [0005] The present invention relates to computer systems. In particular, the invention relates to optimization of n-base typed arithmetic expressions. Background technique [0006] figure 1 Preprocessing of computer programs is illustrated. The user writes the program in the high-level programming language 10 . Programs written in high-level programming language 10 are compiled into low-level mac...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/00G06K19/07G06F9/45
CPCG06F8/4434G06F8/52
Inventor 陈志群J·施瓦贝
Owner SUN MICROSYSTEMS INC