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Method and device for computing coding dynamic images at fixed complicacy

A technology of computational complexity and image, applied in the field of video coding system, which can solve the problems of different complexity and inability to perform real-time coding, etc.

Inactive Publication Date: 2003-09-03
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the threshold T is a fixed value within the video sequence, the complexity in DCT computation becomes different for each block or frame
Especially, when a software video encoder is executed by a PC or a media processor, if the DCT computational complexity changes by macroblock or frame, real-time encoding cannot be performed due to the limitation of the computational complexity of the PC or media processor.

Method used

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  • Method and device for computing coding dynamic images at fixed complicacy
  • Method and device for computing coding dynamic images at fixed complicacy
  • Method and device for computing coding dynamic images at fixed complicacy

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Embodiment Construction

[0016] figure 2 is a block diagram of the structure of a video encoder according to the present invention. see figure 2 , the input video data includes a plurality of frames in units of 8×8 blocks.

[0017] A discrete cosine transform (DCT) unit 220 DCT-processes input video data in an 8×8 block-by-block manner in response to a DCT skip control signal generated by the DCT skip unit 290 , or processes input video data not to be encoded. The quantizer (Q) 230 quantizes video data on which DCT is performed by the DCT unit 220 . A variable length coding (VLC) unit 240 removes statistical redundancy in quantized video data. The inverse quantizer (IQ) 250 inverse quantizes the video data quantized by the Q 230 . An inverse DCT (IDCT) unit 260 performs IDCT on the video data inversely quantized by the IQ 250 . The frame memory (FM) unit 270 stores video data on which IDCT is performed by the IDCT unit 260 in units of frames. The motion estimation (ME) unit 280 estimates a sum...

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Abstract

The sum of absolute difference (SAD) of candidate motion vectors of a moving image is compared with a threshold value of a previous frame. The search for the motion vectors of macro block is terminated, when the SAD of each candidate motion vector is smaller than the threshold value. The threshold value with respect to the next frame is updated, based on number of the search points per macro block of the current frame. Independent claims are also included for the following: (1) apparatus to encode moving image; and (2) computer-readable storage medium storing instructions for controlling computer to estimate motion of moving image.

Description

technical field [0001] The present invention relates to a video coding system, and in particular to a method and apparatus for coding moving images with a fixed computational complexity independent of the characteristics of the moving images. Background technique [0002] Traditionally, moving pictures are encoded by hardware. However, improvements in the performance of central processing units (CPUs) of personal computers (PCs) and the development of high-performance media processors have made it possible to encode moving images by software. Therefore, there is a need for an encoding technique for effectively reducing the amount of computation to compress and restore moving images in real time. For example, if the motion of a moving picture is estimated with a video encoder according to the H.263 standard using an n-step search, the discrete cosine transform (DCT) / inverse DCT module occupies 30% of the processing time in the video encoder. To reduce such computational com...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N19/105H03M7/30H03M7/36H04N5/14H04N7/24H04N19/12H04N19/134H04N19/136H04N19/139H04N19/14H04N19/172H04N19/176H04N19/196H04N19/423H04N19/46H04N19/463H04N19/50H04N19/503H04N19/51H04N19/513H04N19/517H04N19/60H04N19/61H04N19/625H04N19/70H04N19/91
CPCH04N19/00781H04N19/00278H04N19/00157H04N19/00048H04N19/00127H04N7/504H04N19/00266H04N7/2617H04N5/145H04N19/00296H04N19/00103H04N19/00357H04N19/176H04N19/172H04N19/61H04N19/112H04N19/127H04N19/132H04N19/14H04N19/18H04N19/192H04N19/51
Inventor 宋秉哲千畺旭
Owner SAMSUNG ELECTRONICS CO LTD