High-frequency switched circuit

A high-frequency switch and circuit technology, which is applied in the direction of electronic switches, resonant circuit adjustment, electrical components, etc., can solve the problem of not being able to use high-frequency switch circuits, achieve good high-frequency characteristics, and reduce insertion loss.

Active Publication Date: 2004-10-20
PANASONIC SEMICON SOLUTIONS CO LTD
View PDF3 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the structure of the prior art described above, since the voltage at the intermediate connection point is arbitrarily determined, it is not possible to use a high-frequency switching circuit in the state where the on-resistance value is the lowest.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-frequency switched circuit
  • High-frequency switched circuit
  • High-frequency switched circuit

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment

[0045] use figure 1 A circuit diagram showing a high-frequency switching circuit according to the first embodiment of the present invention. exist figure 1 In , symbols 101 to 104 denote depletion-type first to fourth FETs connected in series. Reference numerals 201 to 204 denote first to fourth resistors for applying gate bias to the first to fourth FETs 101 to 104. Reference numerals 205 to 209 denote fifth to ninth resistors for fixing source-drain voltages of the first to fourth FETs 101 to 104 . Reference numeral 301 denotes a first high-frequency signal input / output terminal, and reference numeral 302 denotes a second high-frequency signal input / output terminal. Reference numeral 401 denotes a first control terminal, and reference numeral 402 denotes a second control terminal.

[0046] Next, a specific connection relationship will be described. The drain terminal of FET101 is connected to the source terminal of FET102, the drain terminal of FET102 is connected to ...

no. 2 Embodiment

[0061] In the first embodiment of the circuit of the present invention, the resistors 205 to 209 which fix the potentials of both ends of the series circuit of FETs 101 to 104 and the intermediate connection point have a resistance value of 1 kΩ or more. The upper limit of the resistance value of the resistors 205 to 209 is not particularly specified, but practically, it is preferable to use a resistor of 1 MΩ or less to 10 MΩ or less. In addition, the resistance values ​​of the resistors 201 to 204 are set within a range of several tens of kΩ to several hundreds of kΩ, for example.

[0062] With this structure, it is possible to prevent the signals passing through the FETs 101-104 from leaking through the resistors 205-209. Other effects are the same as those of the first embodiment.

no. 3 Embodiment

[0064] use figure 2 A circuit diagram showing a high-frequency switching circuit according to a third embodiment of the present invention. In the first embodiment described above, the voltage supplied from the outside is directly applied to the control terminal 401 and the control terminal 402 . However, the third embodiment is characterized in that the applied voltage is temporarily boosted, and the boosted voltage is applied to the control terminal 401 and the control terminal 402 .

[0065] For this reason, in the third embodiment, a booster circuit 1001 and a logic circuit 1002 are added to the structure of the first embodiment, and a control terminal 403 for applying a control voltage to the booster circuit 1001 and a control terminal 403 for the logic circuit are added. 1002 plus the control terminal 404 of the control voltage. The boost circuit 1001 boosts the voltage supplied from the control terminal 403 to a desired voltage using a charge pump. The logic circuit ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

One end of each of five resistors is connected to each of the two ends and the respective intermediate points of a cascade of four depression-type FETs, while the other ends of the five resistors are provided with a predetermined voltage. This configuration fixes the source-drain potential of the four FETs. This fixing of the source-drain potential of the FETs permits stable application of a bias voltage for turning ON the FETs between the gate and the source each FET, so as to ensure the ON-OFF switching of the FETs.

Description

technical field [0001] The present invention relates to high-frequency switching circuits incorporated in switching semiconductor integrated circuits and communication terminal devices. In particular, the present invention relates to a high-frequency switching circuit requiring low insertion loss, high insulation performance, and low distortion, and a communication terminal device using the same. This high-frequency switch circuit can be used, for example, as an antenna switch for a mobile phone. Background technique [0002] At present, the development of mobile communication services represented by automobile phones and mobile phones is attracting attention, and various mobile communication systems are being used in countries all over the world. On the other hand, in these mobile communication systems, a semiconductor field-effect transistor (FET: Field-effect transistor) is used in the signal processing part of most portable terminals. In particular, for portable termin...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/687
CPCH03J2200/29H03K17/687
Inventor 日高贤一多良胜司中塚忠良
Owner PANASONIC SEMICON SOLUTIONS CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap