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Flat display panel with the same signal delay and signal line structure thereof

A flat display and signal line technology, applied to static indicators, identification devices, instruments, etc., can solve the problem of waste of cost in process conditions

Active Publication Date: 2005-06-29
AU OPTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, although changing the line width or changing the surface resistivity can make the resistance values ​​of different lines the same, but the process conditions need to be greatly corrected, which wastes cost.

Method used

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  • Flat display panel with the same signal delay and signal line structure thereof
  • Flat display panel with the same signal delay and signal line structure thereof
  • Flat display panel with the same signal delay and signal line structure thereof

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0023] Please also refer to Figure 2A and Figure 2B , Figure 2A is a schematic diagram of a signal line group used in a flat display panel according to a first embodiment of the present invention, Figure 2B is along Figure 2A Sectional view of section line 2B-2B'. The flat display panel 200 is driven by a signal output device 204 (data driver or gate driver). The flat display panel 200 is, for example, a liquid crystal display panel, including: a substrate 202, a pixel area 206, and a signal line group 208; the signal line group 208 includes several main signal lines and auxiliary signal lines. Please refer to Figure 2B , the main signal line is formed by the first metal material 210 and arranged in parallel on the substrate 202 , and the auxiliary signal line is formed by the second metal material 212 and arranged substantially parallel to the main signal line. The signal output device 204 is electrically connected to the first metal material 210, the signal outpu...

no. 2 example

[0031] Please refer to Figure 3A , which is a schematic diagram of the signal line group used in the flat display panel of the second embodiment. The signal line group 308 includes: a first main signal line 308a, a second main signal line 308b, a first auxiliary signal line 322 having a first line segment 371a and a second line segment 371b, a first auxiliary signal line 322 having a third line segment 371c and a fourth line segment 371d The second auxiliary signal line 326, the two first through holes 323a and 323b, and the two second through holes 324a and 324b. In this embodiment, the first path is formed by electrically connecting the first main signal line 308a, the first line segment 371a, the second line segment 371b and the two first through holes 323a and 323b. The second path is formed by electrically connecting the second main signal line 308b, the third line segment 371c, the fourth line segment 371d and the two second through holes 324a and 324b. The second emb...

no. 3 example

[0034] Please also refer to Figure 4A , Figure 4B , Figure 4A It is a schematic diagram of the signal line group used in the flat display panel of the third embodiment. Figure 4B is along Figure 4A The sectional view of section line 4B-4B'. Different from the first embodiment, the third embodiment further includes a first ITO (Indium Tin Oxide, ITO) signal line 414a and a second ITO signal line 414b, which are respectively arranged on the first main signal line 414a. The line 408a is above the two first through holes and the second main signal line 408b is above the two second through holes. The first ITO signal line 414a and the second ITO signal line 414b are connected to the first main signal line 408a, The first auxiliary signal line 422 is electrically connected to the second main signal line 408 b and the second auxiliary signal line 426 . That is, the first path of this embodiment includes: the first main signal line 408a, the first auxiliary signal line 422,...

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Abstract

It is a signal structure used in plane display panel, which comprises one base plate, one first main signal line, one second main signal line and one assistant signal line and one second assistant signal line, wherein, the first main signal line is set on the base plate made of first metal materials; the second main signal line is set on the base plate made of first metal materials; the first assistant signal line is formed by second metal materials and is connected with the first main signal line to form first path; the second assistant signal line is formed by second metal materials and is connected with the second main signal line to form the second path.

Description

technical field [0001] The present invention relates to a flat panel display, and more particularly to a flat panel display using different signal lines with the same equivalent resistance value to make the signal delay time the same. Background technique [0002] The liquid crystal display panel has replaced the traditional cathode vacuum tube display and has become the mainstream display. The problem that the display panel often encounters at present is that the transmission time of the signal output from the chip of the driving circuit to the scanning line or data line electrically connected to the pixel is inconsistent. , resulting in poor image formation. The main reason is that the spacing between the output pins of the chip is different from the spacing between data lines or scanning lines, so that the signal transmission lines are arranged in a fan shape, and the length of each signal transmission line is different. Hereby describe in detail as follows. [0003] Pl...

Claims

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Application Information

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IPC IPC(8): G02F1/133G09F9/00G09G3/36
Inventor 黄信恺陈宗辉陈晶川陈威佑刘文忠吴威宪黄建恺
Owner AU OPTRONICS CORP