Photolithography exposure apparatus, system and photolithography patterning method
A technology of exposure device and exposure system, which is applied to microlithography exposure equipment, photolithographic process exposure devices, optics, etc., can solve the problems of reducing the consistency of key dimensions and line width differences, and achieve improved consistency and consistent delay time. , the effect of enhancing performance
Active Publication Date: 2011-09-21
TAIWAN SEMICON MFG CO LTD
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Problems solved by technology
However, EUV photoresist materials are susceptible to Post Exposure Delay (PED), and it is difficult for existing exposure devices to maintain PED within an acceptable level, thus causing differences in line width and reducing the cost of critical dimensions. consistency
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[0041] The present invention relates to a photolithographic system and a method for performing a photolithographic patterning process using the system. It is to be understood, however, that the following description provides many different embodiments, or examples, for implementing various features of the invention. Specific components and examples of configurations are described below to simplify the present disclosure. Of course, these are examples only and are not intended to limit the present invention.
[0042] Please refer to figure 1 , which shows a schematic diagram of an exemplary embodiment of a lithography system 100 constructed in accordance with many aspects of the present invention. The photolithography system 100 is configured and designed to reduce the impact of post-exposure delay time and provide a photoresist pattern with a uniform critical dimension (UCD) during the photolithography patterning process.
[0043] The photolithography system 100 includes an...
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The present disclosure relates to a lithography apparatus, system and a lithography graphic method. The apparatus at least includes an exposure module, a baking module and a control module. The exposure module is designed for exposure processing; the baking module is designed for post exposure baking (PEB) and composed of a plurality of baking plates; and the control module is designed to control the exposure module and the baking module, wherein the control module may be designed capable of relating the exposure processing and the PEB applied to a substrate for controlling the post exposure delay time such that the post exposure delay time is unified over various substrates. The control module is designed capable of assigning one of the plurality of baking plates to the substrate, and is designed capable of utilizing an exposure recipe for the exposure processing to the substrate, wherein the exposure recipe is adjusted and assigned to be associated with the baking plates of the substrate for eliminating or reducing substrate-to-substrate PEB variation, or eliminating or reducing the PEB in the substrate.
Description
technical field [0001] The invention relates to a semiconductor exposure device, in particular to a photolithography exposure device, a system and a photolithography patterning method including post-exposure baking equipment. Background technique [0002] Photolithography is the process of patterning a substrate, such as a semiconductor wafer, using a photomask or mask. As a result of continued shrinking feature sizes and pitches and / or increasing pattern densities that produce integrated circuits (ICs), various light sources and photoresist materials have been employed. For example, in the nanoscale photolithography process and integrated circuit manufacturing, chemically amplified photoresist (Chemical Amplified Photoresist; CAR) can be used with deep ultraviolet (Deep Ultraviolet; DUV). However, EUV photoresist materials are susceptible to Post Exposure Delay (PED), and it is difficult for existing exposure devices to maintain PED within an acceptable level, thus causing...
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IPC IPC(8): G03F7/20G03F7/38G03F7/40G03F7/26H01L21/027
CPCH01L21/67748G03F7/70991H01L21/67225
Inventor 李凤宁陈永镇高耀寰柯力仁林进祥
Owner TAIWAN SEMICON MFG CO LTD