Method and apparatus for handling reversion of primary and secondary clock systems

Abstract

The present invention discloses a method of disposing the reversing of the master backup in the clock system, includes: making the quartz clocks of the main and spare clock system arrive at the clockselective circuit through the rear panel; the clock selective circuits all choose the quartz clock of the clock system as output; locking down the output of the clock selective circuit with phase lockloop circuit, obtain the output clock of the main and spare clock system; the output clock is driven to each business unit point-to-point. The invention also discloses a sort of equipment for disposingthe reversing of the master backup in the clock system, characterized in that the main and spare clock system comprise a quartz, a clock selective circuit, a phase lock loop circuit and a clock drive r circuit. The present invention settles the problems that the clock phase differs greatly and the error code percentage is high during the reversing procedure of the master backup.

Description

technical field [0001] The present invention relates to the field of communication and other electronic fields, in particular to a method and device for processing master-standby switchover of a clock system. Background technique [0002] At present, with the rapid development of broadband networks, users not only put forward high requirements for the content of network services, but also pay more and more attention to the quality of network services, which puts forward higher and higher requirements for the reliability of communication equipment. In order to improve the reliability of the system, the most commonly used method is to adopt the active and standby working mode for the core board. When the active core board fails, the business is transferred to the standby core board that can work normally through the active and standby switchover. With the improvement of users' requirements for network service quality, higher requirements must be placed on the bit error rate of...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a method and device for processing the active / standby switchover of the clock system, so as to solve the problems that the clock phase difference is too large and the bit error rate is high during the active / standby switchover process of the core board

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