Electronic device and its manufacturing method

A technology for electronic devices and manufacturing methods, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve problems such as high leakage current, inability to form groove patterns, and photoresist residues.
CN1698194AInactive Publication Date: 2005-11-16PANASONIC CORP +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
PANASONIC CORP
Publication Date
2005-11-16
Estimated Expiration
Not applicable · inactive patent

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention provides an electronic device for depressing leakage current increase of insulation films between wiring and membranous time variation, preventing the photosensitive resist poisoning. A first nitrogen-containing insulating film 103 is arranged under a low dielectric constant film 105 with a channel hole 108, a first nitrogen-non-containing insulating film 104 is clamped by the underside of the low dielectric constant film 105. A second nitrogen-containing insulating film 107 is arranged over the low dielectric constant film 105 where a second nitrogen-non-containing insulating film 107 is clamped.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The present invention relates to an electronic device and its manufacturing method, in particular to a wiring forming technique. Background technique

[0002] In recent years, as integrated circuits have become more highly integrated, wiring intervals have been narrowed, and thus electric parasitic capacitance generated between wirings has increased. On the other hand, in an integrated circuit that requires high-speed operation, it is necessary to reduce the electric parasitic capacitance between wirings.

[0003] Therefore, in order to reduce the electric parasitic capacitance between wirings, the method of reducing the dielectric constant of the insulating film between wirings is examined. The method of minimizing the electric parasitic capacitance between wirings is a method proposed by the present invention, which uses a film made of a material with a lower dielectric constant than a silicon oxide film, for example, as an insulating film between w...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More