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Semiconductor device and cellular phone using it

A technology for portable phones and semiconductors, which is used in electrical digital data processing, general-purpose stored-program computers, architectures with a single central processing unit, etc., and can solve problems such as insufficient internal CPU1 performance, application function or performance limitations, and increased power consumption.

Inactive Publication Date: 2007-01-17
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, when the number of processing circuits increases and the amount of control processing required increases, or in order to perform high-performance processing, the amount of control processing required for some processing circuits increases. Insufficient, the function or performance of the achievable application is limited
[0012] Furthermore, since the control of the processing circuit is fixed and centralized in the internal CPU 1, the operating frequency of the internal CPU 1 becomes high, leading to an increase in power consumption.

Method used

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  • Semiconductor device and cellular phone using it
  • Semiconductor device and cellular phone using it
  • Semiconductor device and cellular phone using it

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0068] figure 1 It is a block diagram of the semiconductor device 100 in Embodiment 1 of the present invention. The semiconductor device 100 of this embodiment includes a processor unit 110 , an internal interface unit 130 , an external interface unit 140 , a plurality of processing circuits 121 to 126 , and a connection control circuit 180 . The processing circuits 121 to 126 correspond to a data processing unit.

[0069] The processor unit 110 has an internal CPU 113 .

[0070] The external interface unit 140 has an interface unit 143 through which the external CPU 201 can be connected. The internal CPU 113 and the interface unit 143 are internally connected.

[0071] The internal interface unit 130 has a first bus 191 connected to the internal CPU 113, a second bus 192 connected to the external CPU 201 via the interface unit 143, and each of the plurality of processing circuits 121 to 126 is connected to the first bus 191 or the second bus. 192 selects the selection ci...

Embodiment approach 2

[0079] figure 2 It is a block diagram of the semiconductor device 100 in Embodiment 2 of this invention. exist figure 2 in, for with figure 1 The same structural elements are assigned the same reference numerals, and description thereof will be omitted.

[0080] The semiconductor device 100 of this embodiment includes a processor unit 110 , an internal interface unit 130 , an external interface unit 140 , a plurality of processing circuits 121 to 126 , and a connection control circuit 180 .

[0081] The semiconductor device 100 of the present embodiment is different from the semiconductor device 100 of the first embodiment of the present invention in that the external interface unit 140 has a first interface unit 141 and a second interface unit 142, and the external CPU 201 is connected to the first interface unit 141. The external CPU 202 is connected to the second interface unit 142 .

[0082] Furthermore, the internal interface unit 130 has a first arbitration circui...

Embodiment approach 3

[0088] image 3 It is a block diagram of the semiconductor device 100 in Embodiment 3 of the present invention. exist image 3 in, for with figure 2 The same structural elements are assigned the same reference numerals, and descriptions thereof are omitted.

[0089] The semiconductor device 100 of the present embodiment includes a processor unit 110 , an internal interface unit 130 , an external interface unit 140 , a plurality of processing circuits 121 to 126 , and a connection control circuit 180 .

[0090] The semiconductor device 100 of this embodiment can be regarded as figure 2 The shown modification of the semiconductor device 100 according to Embodiment 2 of the present invention. That is, the internal interface unit 130 of the present embodiment is configured to omit figure 2 In the first coordinating circuit 151, only the external CPU 201 is always connected to the first bus 191.

[0091] Therefore, in the semiconductor device 100 of this embodiment, the ex...

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PUM

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Abstract

A semiconductor device (100) is provided with a processor part (110) having an internal CPU (113), an internal interface part (130), an external interface part (140) for connecting with an external CPU (201) through an interface unit (143), a plurality of processing circuits (121-126) and a connection control circuit (180). The internal interface part (130) is provided with a first bus (191) connected with the internal CPU (113), a second bus (192) connected with the external CPU (201) through the interface unit (143), and selection circuits (131-136) which select each connection of the plurality of circuits (121-126) with the first bus (191) or the second bus (192). Selection by the selection circuits (131-136) is controlled by the connection control circuit (180), following a command from the internal CPU (113) or the external CPU (201). Each of the processing circuits (121-126) can be controlled by the internal CPU (113) or the external CPU (201).

Description

technical field [0001] The present invention relates to a semiconductor device that performs signal processing of image data, sound / audio data, and the like. Background technique [0002] As a conventional semiconductor device that has an interface connectable to an external CPU and performs signal processing of multimedia data such as images and audio, there is a semiconductor device described in Document 1 (Japanese Patent Laid-Open No. 2002-238034). Figure 14 It is a block diagram of a conventional semiconductor device 10 for multimedia data processing. [0003] Figure 14 The illustrated semiconductor device 10 is described in Document 1. An internal CPU 1 , a video processor 2 , and an audio processor 3 are connected to a bus 9 , and the internal CPU 1 is connected to an external CPU 4 via a not-shown interface. The internal CPU 1 performs overall control of the semiconductor device 10 , the video processor 2 processes video signals, and the audio processor 3 processes...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/78
CPCG06F15/7832G06F15/78G06F15/00
Inventor 星野将史东岛胜义西田要一
Owner PANASONIC CORP