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Methods of forming metal-insulator-metal (mim) capacitors with passivation layers on dielectric layers and devices so formed

A technology for capacitors and insulating layers, which is applied in the field of forming structures in integrated circuits using a dual damascene process, and can solve problems such as the difficulty of reducing the overall size of capacitors

Inactive Publication Date: 2007-02-14
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, it is also necessary to increase the capacitance per unit area of ​​such capacitors, which makes it difficult to reduce the overall size of capacitors used in high-density integrated circuits

Method used

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  • Methods of forming metal-insulator-metal (mim) capacitors with passivation layers on dielectric layers and devices so formed
  • Methods of forming metal-insulator-metal (mim) capacitors with passivation layers on dielectric layers and devices so formed
  • Methods of forming metal-insulator-metal (mim) capacitors with passivation layers on dielectric layers and devices so formed

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Embodiment Construction

[0023] The present invention is described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are presented. However, this invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity.

[0024] It should be understood that when an element or layer is "on" or "connected to" or "coupled to" another element or layer, it may be directly on the other element or layer or directly connected or coupled to the other element or layer. Other elements or layers, intervening elements or layers may also be present. In contrast, when an element is "directly on" or "directly connected to" or "directly coupled...

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Abstract

The inventin discloses methods of forming a dielectric layer of a MIM capacitor which can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are also disclosed.

Description

technical field [0001] The present invention relates to methods of forming structures in integrated circuits, and more particularly, to methods of forming structures in integrated circuits using dual damascene processes. Background technique [0002] As the density of integrated circuits increases, there is a need to reduce the size of associated capacitors, eg, in dynamic random access memories (DRAM). However, it is also necessary to increase the capacitance per unit area of ​​such capacitors, which makes it difficult to reduce the overall size of capacitors used in high-density integrated circuits. A type of capacitor has been developed to solve the above-mentioned problems in Metal-Insulator-Metal (MIM) type capacitors. [0003] Figure 1-3 is a cross-sectional view illustrating a conventional method of manufacturing a MIM capacitor. Particularly, figure 1 A chip region (C) and a scribe region (S) of an integrated circuit substrate are shown. according to figure 1...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L21/768H01L21/82H01L21/8242H01L27/00H01L27/108H01L23/522
CPCH01L28/40H01L23/5223H01L2924/0002H01L2924/00H10B12/00
Inventor 金钟采李德珉郑相日洪钟郁
Owner SAMSUNG ELECTRONICS CO LTD
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